[v2,04/13] RISC-V: KVM: Break down the __kvm_riscv_switch_to() into macros

From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <anup@brainfault.org>,
	kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>
Subject: [PATCH v2 04/13] RISC-V: KVM: Break down the __kvm_riscv_switch_to()
 into macros
Date: Mon, 21 Oct 2024 01:17:25 +0530
Message-ID: <20241020194734.58686-5-apatel@ventanamicro.com>
In-Reply-To: <20241020194734.58686-1-apatel@ventanamicro.com>
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Message ID	20241020194734.58686-5-apatel@ventanamicro.com
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Headers	show Return-Path: <kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org> From: Anup Patel <apatel@ventanamicro.com> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com> Cc: Atish Patra <atishp@atishpatra.org>, Andrew Jones <ajones@ventanamicro.com>, Anup Patel <anup@brainfault.org>, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel <apatel@ventanamicro.com>, Atish Patra <atishp@rivosinc.com> Subject: [PATCH v2 04/13] RISC-V: KVM: Break down the __kvm_riscv_switch_to() into macros Date: Mon, 21 Oct 2024 01:17:25 +0530 Message-ID: <20241020194734.58686-5-apatel@ventanamicro.com> In-Reply-To: <20241020194734.58686-1-apatel@ventanamicro.com> References: <20241020194734.58686-1-apatel@ventanamicro.com> MIME-Version: 1.0 preview: Break down the __kvm_riscv_switch_to() function into macros so that these macros can be later re-used by SBI NACL extension based low-level switch function. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> --- arch/riscv/kvm/vcpu_switch.S \| 52 +++++++++++++++++++++++++++--------- 1 file changed, 40 inserti [...] Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1033 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kvm-riscv" <kvm-riscv-bounces@lists.infradead.org> Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
Series	Accelerate KVM RISC-V when running as a guest \| expand [v2,00/13] Accelerate KVM RISC-V when running as a guest [v2,01/13] RISC-V: KVM: Order the object files alphabetically [v2,02/13] RISC-V: KVM: Save/restore HSTATUS in C source [v2,03/13] RISC-V: KVM: Save/restore SCOUNTEREN in C source [v2,04/13] RISC-V: KVM: Break down the __kvm_riscv_switch_to() into macros [v2,05/13] RISC-V: KVM: Replace aia_set_hvictl() with aia_hvictl_value() [v2,06/13] RISC-V: KVM: Don't setup SGEI for zero guest external interrupts [v2,07/13] RISC-V: Add defines for the SBI nested acceleration extension [v2,08/13] RISC-V: KVM: Add common nested acceleration support [v2,09/13] RISC-V: KVM: Use nacl_csr_xyz() for accessing H-extension CSRs [v2,10/13] RISC-V: KVM: Use nacl_csr_xyz() for accessing AIA CSRs [v2,11/13] RISC-V: KVM: Use SBI sync SRET call when available [v2,12/13] RISC-V: KVM: Save trap CSRs in kvm_riscv_vcpu_enter_exit() [v2,13/13] RISC-V: KVM: Use NACL HFENCEs for KVM request based HFENCEs

[v2,04/13] RISC-V: KVM: Break down the __kvm_riscv_switch_to() into macros

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