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([180.255.73.78]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2cb77492bc6sm4891461a91.1.2024.07.21.00.06.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jul 2024 00:06:10 -0700 (PDT) From: James Raphael Tiovalen To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: andrew.jones@linux.dev, atishp@rivosinc.com, cade.richard@berkeley.edu, James Raphael Tiovalen Subject: [kvm-unit-tests PATCH v4 1/5] riscv: Extend exception handling support for interrupts Date: Sun, 21 Jul 2024 15:05:56 +0800 Message-ID: <20240721070601.88639-2-jamestiotio@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240721070601.88639-1-jamestiotio@gmail.com> References: <20240721070601.88639-1-jamestiotio@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240721_000612_564272_4B7DC96F X-CRM114-Status: GOOD ( 12.95 ) X-Spam-Score: -2.1 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Andrew Jones Add install_irq_handler() to enable tests to install interrupt handlers. Also add local_irq_enable() and local_irq_disable() to respectively enable and disable IRQs via the sstatus.SIE bit. Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1036 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [jamestiotio(at)gmail.com] X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Andrew Jones Add install_irq_handler() to enable tests to install interrupt handlers. Also add local_irq_enable() and local_irq_disable() to respectively enable and disable IRQs via the sstatus.SIE bit. Signed-off-by: Andrew Jones Signed-off-by: James Raphael Tiovalen --- lib/riscv/asm/csr.h | 2 ++ lib/riscv/asm/processor.h | 13 +++++++++++++ lib/riscv/processor.c | 27 +++++++++++++++++++++++---- 3 files changed, 38 insertions(+), 4 deletions(-) diff --git a/lib/riscv/asm/csr.h b/lib/riscv/asm/csr.h index 52608512..d6909d93 100644 --- a/lib/riscv/asm/csr.h +++ b/lib/riscv/asm/csr.h @@ -11,6 +11,8 @@ #define CSR_STVAL 0x143 #define CSR_SATP 0x180 +#define SR_SIE _AC(0x00000002, UL) + /* Exception cause high bit - is an interrupt if set */ #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h index 32c499d0..6451adb5 100644 --- a/lib/riscv/asm/processor.h +++ b/lib/riscv/asm/processor.h @@ -5,6 +5,7 @@ #include #define EXCEPTION_CAUSE_MAX 16 +#define INTERRUPT_CAUSE_MAX 16 typedef void (*exception_fn)(struct pt_regs *); @@ -13,6 +14,7 @@ struct thread_info { unsigned long hartid; unsigned long isa[1]; exception_fn exception_handlers[EXCEPTION_CAUSE_MAX]; + exception_fn interrupt_handlers[INTERRUPT_CAUSE_MAX]; }; static inline struct thread_info *current_thread_info(void) @@ -20,7 +22,18 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)csr_read(CSR_SSCRATCH); } +static inline void local_irq_enable(void) +{ + csr_set(CSR_SSTATUS, SR_SIE); +} + +static inline void local_irq_disable(void) +{ + csr_clear(CSR_SSTATUS, SR_SIE); +} + void install_exception_handler(unsigned long cause, void (*handler)(struct pt_regs *)); +void install_irq_handler(unsigned long cause, void (*handler)(struct pt_regs *)); void do_handle_exception(struct pt_regs *regs); void thread_info_init(void); diff --git a/lib/riscv/processor.c b/lib/riscv/processor.c index ece7cbff..0dffadc7 100644 --- a/lib/riscv/processor.c +++ b/lib/riscv/processor.c @@ -36,10 +36,21 @@ void do_handle_exception(struct pt_regs *regs) { struct thread_info *info = current_thread_info(); - assert(regs->cause < EXCEPTION_CAUSE_MAX); - if (info->exception_handlers[regs->cause]) { - info->exception_handlers[regs->cause](regs); - return; + if (regs->cause & CAUSE_IRQ_FLAG) { + unsigned long irq_cause = regs->cause & ~CAUSE_IRQ_FLAG; + + assert(irq_cause < INTERRUPT_CAUSE_MAX); + if (info->interrupt_handlers[irq_cause]) { + info->interrupt_handlers[irq_cause](regs); + return; + } + } else { + assert(regs->cause < EXCEPTION_CAUSE_MAX); + + if (info->exception_handlers[regs->cause]) { + info->exception_handlers[regs->cause](regs); + return; + } } show_regs(regs); @@ -47,6 +58,14 @@ void do_handle_exception(struct pt_regs *regs) abort(); } +void install_irq_handler(unsigned long cause, void (*handler)(struct pt_regs *)) +{ + struct thread_info *info = current_thread_info(); + + assert(cause < INTERRUPT_CAUSE_MAX); + info->interrupt_handlers[cause] = handler; +} + void install_exception_handler(unsigned long cause, void (*handler)(struct pt_regs *)) { struct thread_info *info = current_thread_info();