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Tue, 28 Nov 2023 06:56:49 -0800 (PST) From: Anup Patel To: Will Deacon , julien.thierry.kdev@gmail.com, maz@kernel.org Cc: Paolo Bonzini , Atish Patra , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Anup Patel Subject: [kvmtool PATCH 03/10] riscv: Make CPU_ISA_MAX_LEN depend upon isa_info_arr array size Date: Tue, 28 Nov 2023 20:26:21 +0530 Message-Id: <20231128145628.413414-4-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231128145628.413414-1-apatel@ventanamicro.com> References: <20231128145628.413414-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231128_065650_830286_E3C3E149 X-CRM114-Status: GOOD ( 10.69 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Currently, the CPU_ISA_MAX_LEN is a fixed value so we will easily run out of space when all possible ISA extensions supported by KVM RISC-V are available. Instead of above, let us make CPU_ISA_MAX_LEN depend upon the isa_info_arr[] array size so that CPU_ISA_MAX_LEN automatically adapts to growing number of ISA extensions. Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:636 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Currently, the CPU_ISA_MAX_LEN is a fixed value so we will easily run out of space when all possible ISA extensions supported by KVM RISC-V are available. Instead of above, let us make CPU_ISA_MAX_LEN depend upon the isa_info_arr[] array size so that CPU_ISA_MAX_LEN automatically adapts to growing number of ISA extensions. Signed-off-by: Anup Patel --- riscv/fdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/fdt.c b/riscv/fdt.c index b45f731..230d1f8 100644 --- a/riscv/fdt.c +++ b/riscv/fdt.c @@ -44,7 +44,6 @@ static void dump_fdt(const char *dtb_file, void *fdt) } #define CPU_NAME_MAX_LEN 15 -#define CPU_ISA_MAX_LEN 128 static void generate_cpu_nodes(void *fdt, struct kvm *kvm) { int cpu, pos, i, index, valid_isa_len; @@ -60,6 +59,7 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm) for (cpu = 0; cpu < kvm->nrcpus; ++cpu) { char cpu_name[CPU_NAME_MAX_LEN]; +#define CPU_ISA_MAX_LEN (ARRAY_SIZE(isa_info_arr) * 16) char cpu_isa[CPU_ISA_MAX_LEN]; struct kvm_cpu *vcpu = kvm->cpus[cpu]; struct kvm_one_reg reg;