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Apply
«
1
2
»
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v6,14/14] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG
riscv: add SBI FWFT misaligned exception delegation support
- - 2 -
-
-
-
2025-04-24
Clément Léger
New
[v6,13/14] RISC-V: KVM: add support for FWFT SBI extension
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,12/14] RISC-V: KVM: add SBI extension reset callback
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,11/14] RISC-V: KVM: add SBI extension init()/deinit() functions
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,10/14] riscv: misaligned: add a function to check misalign trap delegability
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,09/14] riscv: misaligned: move emulated access uniformity check in a function
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,08/14] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,06/14] riscv: misaligned: request misaligned exception from SBI
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,05/14] riscv: sbi: add SBI FWFT extension calls
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,04/14] riscv: sbi: add FWFT extension interface
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,03/14] riscv: sbi: add new SBI error mappings
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,02/14] riscv: sbi: remove useless parenthesis
riscv: add SBI FWFT misaligned exception delegation support
- - 1 -
-
-
-
2025-04-24
Clément Léger
New
[v6,01/14] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions
riscv: add SBI FWFT misaligned exception delegation support
- - 3 1
-
-
-
2025-04-24
Clément Léger
New
[kvmtool,v2,10/10] riscv: Allow including extensions in the min CPU type using command-line
Add SBI system suspend and cpu-type option
- - 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,09/10] riscv: Add cpu-type command-line option
Add SBI system suspend and cpu-type option
- - 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,08/10] riscv: Include single-letter extensions in isa_info_arr[]
Add SBI system suspend and cpu-type option
- - 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,07/10] riscv: Fix no params with nodefault segfault
Add SBI system suspend and cpu-type option
- 1 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,06/10] riscv: Make system suspend time configurable
Add SBI system suspend and cpu-type option
- - - -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,05/10] riscv: Add SBI system suspend support
Add SBI system suspend and cpu-type option
- - - -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,04/10] riscv: Add Ziccrse extension support
Add SBI system suspend and cpu-type option
- - 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,03/10] riscv: Add Zabha extension support
Add SBI system suspend and cpu-type option
- - 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,02/10] riscv: Add Svvptc extension support
Add SBI system suspend and cpu-type option
- - 1 -
-
-
-
2025-04-24
Anup Patel
New
[kvmtool,v2,01/10] Sync-up headers with Linux-6.14 kernel
Add SBI system suspend and cpu-type option
- - - -
-
-
-
2025-04-24
Anup Patel
New
[3/3] riscv: Move all duplicate insn parsing macros into asm/insn.h
Move duplicated instructions macros into asm/insn.h
- - 1 -
-
-
-
2025-04-22
Alexandre Ghiti
New
[2/3] riscv: Strengthen duplicate and inconsistent definition of RV_X()
Move duplicated instructions macros into asm/insn.h
- - - -
-
-
-
2025-04-22
Alexandre Ghiti
New
[1/3] riscv: Fix typo EXRACT -> EXTRACT
Move duplicated instructions macros into asm/insn.h
- - 3 -
-
-
-
2025-04-22
Alexandre Ghiti
New
[v2,4/4] RISC-V: KVM: switch to kvm_lock/unlock_all_vcpus
KVM: extract lock_all_vcpus/unlock_all_vcpus
- - - -
-
-
-
2025-04-09
Maxim Levitsky
New
[v2,3/4] KVM: arm64: switch to using kvm_lock/unlock_all_vcpus
KVM: extract lock_all_vcpus/unlock_all_vcpus
- - - -
-
-
-
2025-04-09
Maxim Levitsky
New
[v2,2/4] KVM: x86: move sev_lock/unlock_vcpus_for_migration to kvm_main.c
KVM: extract lock_all_vcpus/unlock_all_vcpus
- - - -
-
-
-
2025-04-09
Maxim Levitsky
New
[v2,1/4] locking/mutex: implement mutex_trylock_nested
KVM: extract lock_all_vcpus/unlock_all_vcpus
- - - -
-
-
-
2025-04-09
Maxim Levitsky
New
[5/5] KVM: RISC-V: reset smstateen CSRs
KVM: RISC-V: VCPU reset fixes
- 1 - -
-
-
-
2025-04-03
Radim Krčmář
New
[4/5] KVM: RISC-V: reset VCPU state when becoming runnable
KVM: RISC-V: VCPU reset fixes
- - - -
-
-
-
2025-04-03
Radim Krčmář
New
[3/5] KVM: RISC-V: remove unnecessary SBI reset state
KVM: RISC-V: VCPU reset fixes
- - 1 -
-
-
-
2025-04-03
Radim Krčmář
New
[2/5] KVM: RISC-V: refactor sbi reset request
KVM: RISC-V: VCPU reset fixes
- - 1 -
-
-
-
2025-04-03
Radim Krčmář
New
[1/5] KVM: RISC-V: refactor vector state reset
KVM: RISC-V: VCPU reset fixes
- - 1 -
-
-
-
2025-04-03
Radim Krčmář
New
[v5,21/21] Sync empty-pmu-events.c with autogenerated one
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,20/21] tools/perf: Pass the Counter constraint values in the pmu events
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,19/21] tools/perf: Support event code for arch standard events
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,18/21] RISC-V: perf: Add Qemu virt machine events
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,17/21] RISC-V: perf: Add legacy event encodings via sysfs
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,16/21] RISC-V: perf: Use config2/vendor table for event to counter mapping
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,15/21] RISC-V: perf: Skip PMU SBI extension when not implemented
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,14/21] RISC-V: perf: Implement supervisor counter delegation support
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,13/21] RISC-V: perf: Add a mechanism to defined legacy event encoding
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,12/21] RISC-V: perf: Modify the counter discovery mechanism
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,11/21] RISC-V: perf: Restructure the SBI PMU code
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-03-27
Atish Patra
New
[v5,10/21] dt-bindings: riscv: add Counter delegation ISA extensions description
Add Counter delegation ISA extension support
1 - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,09/21] RISC-V: Add Ssccfg/Smcdeleg ISA extension definition and parsing
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,08/21] RISC-V: Add Sscfg extension CSR definition
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-03-27
Atish Patra
New
[v5,07/21] dt-bindings: riscv: add Smcntrpmf ISA extension description
Add Counter delegation ISA extension support
1 - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,06/21] RISC-V: Add Smcntrpmf extension parsing
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-03-27
Atish Patra
New
[v5,05/21] RISC-V: Define indirect CSR access helpers
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,04/21] dt-bindings: riscv: add Sxcsrind ISA extension description
Add Counter delegation ISA extension support
1 - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,03/21] RISC-V: Add Sxcsrind ISA extension definition and parsing
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[v5,02/21] RISC-V: Add Sxcsrind ISA extension CSR definitions
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-03-27
Atish Patra
New
[v5,01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware…
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-03-27
Atish Patra
New
[3/3] KVM: riscv: selftests: Add vector extension tests
RISC-V KVM selftests improvements
- - 1 -
-
-
-
2025-03-25
Atish Patra
New
[2/3] KVM: riscv: selftests: Decode stval to identify exact exception type
RISC-V KVM selftests improvements
- - 1 -
-
-
-
2025-03-25
Atish Patra
New
[1/3] KVM: riscv: selftests: Add stval to exception handling
RISC-V KVM selftests improvements
- - 1 -
-
-
-
2025-03-25
Atish Patra
New
[7/7] KVM: Drop kvm_arch_sync_events() now that all implementations are nops
KVM: x86: nVMX IRQ fix and VM teardown cleanups
1 - 1 -
-
-
-
2025-02-24
Sean Christopherson
New
[6/7] KVM: x86: Fold guts of kvm_arch_sync_events() into kvm_arch_pre_destroy_vm()
KVM: x86: nVMX IRQ fix and VM teardown cleanups
- - - -
-
-
-
2025-02-24
Sean Christopherson
New
[5/7] KVM: x86: Unload MMUs during vCPU destruction, not before
KVM: x86: nVMX IRQ fix and VM teardown cleanups
- - - -
-
-
-
2025-02-24
Sean Christopherson
New
[4/7] KVM: x86: Don't load/put vCPU when unloading its MMU during teardown
KVM: x86: nVMX IRQ fix and VM teardown cleanups
- - - -
-
-
-
2025-02-24
Sean Christopherson
New
[3/7] KVM: Assert that a destroyed/freed vCPU is no longer visible
KVM: x86: nVMX IRQ fix and VM teardown cleanups
- - - -
-
-
-
2025-02-24
Sean Christopherson
New
[2/7] KVM: nVMX: Process events on nested VM-Exit if injectable IRQ or NMI is pending
KVM: x86: nVMX IRQ fix and VM teardown cleanups
- - - -
-
-
-
2025-02-24
Sean Christopherson
New
[1/7] KVM: x86: Free vCPUs before freeing VM state
KVM: x86: nVMX IRQ fix and VM teardown cleanups
- - - -
-
-
-
2025-02-24
Sean Christopherson
New
[2/2] KVM: selftests: Create KVM selftest runner
Add KVM selftest runner
- - - -
-
-
-
2025-02-22
Vipin Sharma
New
[1/2] KVM: selftests: Add default testfiles for KVM selftests runner
Add KVM selftest runner
- - - -
-
-
-
2025-02-22
Vipin Sharma
New
[v4,21/21] Sync empty-pmu-events.c with autogenerated one
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,20/21] tools/perf: Pass the Counter constraint values in the pmu events
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,19/21] tools/perf: Support event code for arch standard events
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,18/21] RISC-V: perf: Add Qemu virt machine events
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,17/21] RISC-V: perf: Add legacy event encodings via sysfs
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,16/21] RISC-V: perf: Use config2/vendor table for event to counter mapping
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,15/21] RISC-V: perf: Skip PMU SBI extension when not implemented
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,14/21] RISC-V: perf: Implement supervisor counter delegation support
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,13/21] RISC-V: perf: Add a mechanism to defined legacy event encoding
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,12/21] RISC-V: perf: Modify the counter discovery mechanism
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,11/21] RISC-V: perf: Restructure the SBI PMU code
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-02-06
Atish Patra
New
[v4,10/21] dt-bindings: riscv: add Counter delegation ISA extensions description
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,09/21] RISC-V: Add Ssccfg ISA extension definition and parsing
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,08/21] RISC-V: Add Sscfg extension CSR definition
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-02-06
Atish Patra
New
[v4,07/21] dt-bindings: riscv: add Smcntrpmf ISA extension description
Add Counter delegation ISA extension support
1 - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,06/21] RISC-V: Add Smcntrpmf extension parsing
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-02-06
Atish Patra
New
[v4,05/21] RISC-V: Define indirect CSR access helpers
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,04/21] dt-bindings: riscv: add Sxcsrind ISA extension description
Add Counter delegation ISA extension support
1 - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,03/21] RISC-V: Add Sxcsrind ISA extension definition and parsing
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v4,02/21] RISC-V: Add Sxcsrind ISA extension CSR definitions
Add Counter delegation ISA extension support
- - 1 -
-
-
-
2025-02-06
Atish Patra
New
[v4,01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware…
Add Counter delegation ISA extension support
- - - -
-
-
-
2025-02-06
Atish Patra
New
[v2,9/9] RISC-V: KVM: Upgrade the supported SBI version to 3.0
Add SBI v3.0 PMU enhancements
- - - -
-
-
-
2025-01-15
Atish Patra
New
[v2,8/9] RISC-V: KVM: Implement get event info function
Add SBI v3.0 PMU enhancements
- - - -
-
-
-
2025-01-15
Atish Patra
New
[v2,7/9] RISC-V: KVM: Use the new gpa range validate helper function
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[v2,6/9] KVM: Add a helper function to validate vcpu gpa range
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[v2,5/9] drivers/perf: riscv: Export PMU event info function
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[v2,4/9] drivers/perf: riscv: Implement PMU event info function
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[v2,3/9] RISC-V: KVM: Add support for Raw event v2
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[v2,2/9] drivers/perf: riscv: Add raw event v2 support
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[v2,1/9] drivers/perf: riscv: Add SBI v3.0 flag
Add SBI v3.0 PMU enhancements
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2025-01-15
Atish Patra
New
[RFC,2/2] RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN
RISC-V: KVM: Pointer Masking Support
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2025-01-11
Samuel Holland
New
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