Message ID | 20210323010305.1045293-11-npiggin@gmail.com |
---|---|
State | New |
Headers | show |
Series | KVM: PPC: Book3S: C-ify the P9 entry/exit code | expand |
On Tue, Mar 23, 2021 at 11:02:29AM +1000, Nicholas Piggin wrote: > Rather than add the ME bit to the MSR at guest entry, make it clear > that the hypervisor does not allow the guest to clear the bit. > > The ME set is kept in guest entry for now, but a future patch will > warn if it's not present. > > Reviewed-by: Daniel Axtens <dja@axtens.net> > Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Paul Mackerras <paulus@ozlabs.org>
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c index 158d309b42a3..41cb03d0bde4 100644 --- a/arch/powerpc/kvm/book3s_hv_builtin.c +++ b/arch/powerpc/kvm/book3s_hv_builtin.c @@ -662,6 +662,9 @@ static void kvmppc_end_cede(struct kvm_vcpu *vcpu) void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) { + /* Guest must always run with ME enabled. */ + msr = msr | MSR_ME; + /* * Check for illegal transactional state bit combination * and if we find it, force the TS field to a safe state. diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 851e3f527eb2..886c7fa86add 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -328,7 +328,9 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu) vcpu->arch.nested = l2; vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token; vcpu->arch.regs = l2_regs; - vcpu->arch.shregs.msr = vcpu->arch.regs.msr; + + /* Guest must always run with ME enabled. */ + vcpu->arch.shregs.msr = vcpu->arch.regs.msr | MSR_ME; sanitise_hv_regs(vcpu, &l2_hv); restore_hv_regs(vcpu, &l2_hv);