From patchwork Mon Oct 15 09:33:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 984039 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=kvm-ppc-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ozlabs.ru Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42YYCM2WtvzB4N5 for ; Mon, 15 Oct 2018 20:33:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726515AbeJORRo (ORCPT ); Mon, 15 Oct 2018 13:17:44 -0400 Received: from 107-173-13-209-host.colocrossing.com ([107.173.13.209]:53482 "EHLO ozlabs.ru" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1726273AbeJORRo (ORCPT ); Mon, 15 Oct 2018 13:17:44 -0400 Received: from vpl1.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id D8F6DAE807F3; Mon, 15 Oct 2018 05:33:14 -0400 (EDT) From: Alexey Kardashevskiy To: linuxppc-dev@lists.ozlabs.org Cc: Alexey Kardashevskiy , David Gibson , kvm-ppc@vger.kernel.org, Alistair Popple , Frederic Barrat , Alex Williamson Subject: [PATCH kernel 5/5] powerpc/powernv/npu: Add helper to map GPU to LPAR Date: Mon, 15 Oct 2018 20:33:01 +1100 Message-Id: <20181015093301.1007-6-aik@ozlabs.ru> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181015093301.1007-1-aik@ozlabs.ru> References: <20181015093301.1007-1-aik@ozlabs.ru> Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org In order to make ATS work and translate addresses for arbitrary LPID and PID, we need to program an NPU with these. This implements a helper to assign a GPU to LPAR and program the NPU with a wildcard for PID. The helper also takes MSR (only DR/HV/PR/SF bits are allowed) to program them into NPU2 for ATS checkout requests. Signed-off-by: Alexey Kardashevskiy --- arch/powerpc/include/asm/pci.h | 2 ++ arch/powerpc/platforms/powernv/npu-dma.c | 38 ++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h index f196df6..c3c9728 100644 --- a/arch/powerpc/include/asm/pci.h +++ b/arch/powerpc/include/asm/pci.h @@ -131,5 +131,7 @@ extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev); extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index); extern void pnv_npu2_devices_init(void); extern int pnv_npu2_init(struct pci_controller *hose); +extern int pnv_npu2_map_lpar_dev(struct pci_controller *hose, + struct pci_dev *gpdev, unsigned int lparid, unsigned long msr); #endif /* __ASM_POWERPC_PCI_H */ diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c index 677f30a..1dde753 100644 --- a/arch/powerpc/platforms/powernv/npu-dma.c +++ b/arch/powerpc/platforms/powernv/npu-dma.c @@ -1047,3 +1047,41 @@ void pnv_npu2_map_lpar_phb(struct pnv_phb *nphb, unsigned long msr) dev_err(&gpdev->dev, "Failed to init context: %d\n", ret); } } + +int pnv_npu2_map_lpar_dev(struct pci_controller *hose, struct pci_dev *gpdev, + unsigned int lparid, unsigned long msr) +{ + int ret; + struct pnv_phb *nphb = hose->private_data; + + dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=%u\n", + nphb->opal_id, lparid); + /* + * Currently we only support radix and non-zero LPCR only makes sense + * for hash tables so skiboot expects the LPCR parameter to be a zero. + */ + ret = opal_npu_map_lpar(nphb->opal_id, + PCI_DEVID(gpdev->bus->number, gpdev->devfn), lparid, + 0 /* LPCR bits */); + if (ret) { + dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret); + return ret; + } + + dev_dbg(&gpdev->dev, "destroy context opalid=%llu msr=%lx\n", + nphb->opal_id, msr); + ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/, + PCI_DEVID(gpdev->bus->number, gpdev->devfn)); + if (ret) + dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret); + + dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n", + nphb->opal_id, msr); + ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr, + PCI_DEVID(gpdev->bus->number, gpdev->devfn)); + if (ret) + dev_err(&gpdev->dev, "Failed to init context: %d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(pnv_npu2_map_lpar_dev);