From patchwork Sun May 6 14:20:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 157074 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 885E7B6FB9 for ; Mon, 7 May 2012 00:21:38 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752351Ab2EFOVE (ORCPT ); Sun, 6 May 2012 10:21:04 -0400 Received: from cantor2.suse.de ([195.135.220.15]:51734 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752654Ab2EFOVB (ORCPT ); Sun, 6 May 2012 10:21:01 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 266B5A3DE0; Sun, 6 May 2012 16:21:01 +0200 (CEST) From: Alexander Graf To: kvm-ppc Cc: kvm list , Avi Kivity Subject: [PATCH 04/16] KVM: PPC: Restrict PPC_[L|ST]D macro to asm code Date: Sun, 6 May 2012 16:20:48 +0200 Message-Id: <1336314060-32640-5-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1336314060-32640-1-git-send-email-agraf@suse.de> References: <1336314060-32640-1-git-send-email-agraf@suse.de> Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org We only want asm code macros to be accessible from asm code, so #ifdef it depending on it. Signed-off-by: Alexander Graf --- arch/powerpc/include/asm/kvm_asm.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h index 7d4018d..76fdcfe 100644 --- a/arch/powerpc/include/asm/kvm_asm.h +++ b/arch/powerpc/include/asm/kvm_asm.h @@ -20,6 +20,7 @@ #ifndef __POWERPC_KVM_ASM_H__ #define __POWERPC_KVM_ASM_H__ +#ifdef __ASSEMBLY__ #ifdef CONFIG_64BIT #define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg) #define PPC_LD(treg, offset, areg) ld treg, (offset)(areg) @@ -27,6 +28,7 @@ #define PPC_STD(sreg, offset, areg) stw sreg, (offset+4)(areg) #define PPC_LD(treg, offset, areg) lwz treg, (offset+4)(areg) #endif +#endif /* IVPR must be 64KiB-aligned. */ #define VCPU_SIZE_ORDER 4