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Wed, 29 May 2024 11:23:58 +0000 (UTC) X-CSE-ConnectionGUID: bI9jpPARQnm7W96k83maEQ== X-CSE-MsgGUID: OG+84ahsSB69zGIVVfmXfA== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="17169279" X-IronPort-AV: E=Sophos;i="6.08,198,1712646000"; d="scan'208";a="17169279" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 May 2024 04:23:58 -0700 X-CSE-ConnectionGUID: AMy57ZThSt61j1VcW+Xi3w== X-CSE-MsgGUID: qKJnVYjeQ62irQKp9uqrFw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,198,1712646000"; d="scan'208";a="66277195" Received: from boxer.igk.intel.com ([10.102.20.173]) by orviesa002.jf.intel.com with ESMTP; 29 May 2024 04:23:56 -0700 From: Maciej Fijalkowski To: intel-wired-lan@lists.osuosl.org Date: Wed, 29 May 2024 13:23:37 +0200 Message-Id: <20240529112337.3639084-9-maciej.fijalkowski@intel.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20240529112337.3639084-1-maciej.fijalkowski@intel.com> References: <20240529112337.3639084-1-maciej.fijalkowski@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716981838; x=1748517838; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JxgorqeOgR50t13m+RvvtSW764Pt/UK0PXKKYocvqN8=; b=DC8+m8CJs+IUgnDpXrFPhcSrqI0G7DCRHzpHEMRTWJ73EBgqojAHtWGc x+gXIJKXnh7D7MYNfuhQOjUtLrGn3d2AJBiClFT1Qhnx+mPyqBolPyTsV g+a0wjGEs7bNnhAYJHfNrCCs7btzfNvaX1IIBSUZThD3J/4Ksa+BZGxEY pOdht/C0AnEjkfJfrLY3JP5AshfsLF69qVwyRNDj15fa9NhBpZTXAXVqT Ui8TZjvUjp6VWFABeQVwdn9MC1cO7sdll2qPWGqr8WmCXXJarDbC2o0hi suYliDEYxFV1v1K04kzr2ddOb08IaGaHDpd1yr374sJOiRPyR2ZHCZAc2 A==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=DC8+m8CJ Subject: [Intel-wired-lan] [PATCH v2 iwl-net 8/8] ice: xsk: fix txq interrupt mapping X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maciej Fijalkowski , larysa.zaremba@intel.com, netdev@vger.kernel.org, michal.kubiak@intel.com, anthony.l.nguyen@intel.com, magnus.karlsson@intel.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" ice_cfg_txq_interrupt() internally handles XDP Tx ring. Do not use ice_for_each_tx_ring() in ice_qvec_cfg_msix() as this causing us to treat XDP ring that belongs to queue vector as Tx ring and therefore misconfiguring the interrupts. Fixes: 2d4238f55697 ("ice: Add support for AF_XDP") Signed-off-by: Maciej Fijalkowski Tested-by: Chandan Kumar Rout (A Contingent Worker at Intel) --- drivers/net/ethernet/intel/ice/ice_xsk.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_xsk.c b/drivers/net/ethernet/intel/ice/ice_xsk.c index 693f0e3a37ce..85aa841a16bb 100644 --- a/drivers/net/ethernet/intel/ice/ice_xsk.c +++ b/drivers/net/ethernet/intel/ice/ice_xsk.c @@ -111,25 +111,29 @@ ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring, * ice_qvec_cfg_msix - Enable IRQ for given queue vector * @vsi: the VSI that contains queue vector * @q_vector: queue vector + * @qid: queue index */ static void -ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector) +ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector, u16 qid) { u16 reg_idx = q_vector->reg_idx; struct ice_pf *pf = vsi->back; struct ice_hw *hw = &pf->hw; - struct ice_tx_ring *tx_ring; - struct ice_rx_ring *rx_ring; + int q, _qid = qid; ice_cfg_itr(hw, q_vector); - ice_for_each_tx_ring(tx_ring, q_vector->tx) - ice_cfg_txq_interrupt(vsi, tx_ring->reg_idx, reg_idx, - q_vector->tx.itr_idx); + for (q = 0; q < q_vector->num_ring_tx; q++) { + ice_cfg_txq_interrupt(vsi, _qid, reg_idx, q_vector->tx.itr_idx); + _qid++; + } - ice_for_each_rx_ring(rx_ring, q_vector->rx) - ice_cfg_rxq_interrupt(vsi, rx_ring->reg_idx, reg_idx, - q_vector->rx.itr_idx); + _qid = qid; + + for (q = 0; q < q_vector->num_ring_rx; q++) { + ice_cfg_rxq_interrupt(vsi, _qid, reg_idx, q_vector->rx.itr_idx); + _qid++; + } ice_flush(hw); } @@ -241,7 +245,7 @@ static int ice_qp_ena(struct ice_vsi *vsi, u16 q_idx) fail = err; q_vector = vsi->rx_rings[q_idx]->q_vector; - ice_qvec_cfg_msix(vsi, q_vector); + ice_qvec_cfg_msix(vsi, q_vector, q_idx); err = ice_vsi_ctrl_one_rx_ring(vsi, true, q_idx, true); if (!fail)