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Thu, 4 Apr 2024 09:35:21 +0000 (UTC) X-CSE-ConnectionGUID: wvvzbnXvTHCZbDkxPck3Hg== X-CSE-MsgGUID: XJbIWd0sRsybYh+4rPofDA== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="29966595" X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="29966595" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 02:22:58 -0700 X-CSE-ConnectionGUID: jtU85B/bQAmuP3tgwhLAyw== X-CSE-MsgGUID: k/0Dgu1QQdSTzBhy4En8VQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="56180758" Received: from kkolacin-desk1.igk.intel.com ([10.102.102.152]) by orviesa001.jf.intel.com with ESMTP; 04 Apr 2024 02:22:56 -0700 From: Karol Kolacinski To: intel-wired-lan@lists.osuosl.org Date: Thu, 4 Apr 2024 11:09:54 +0200 Message-ID: <20240404092238.26975-20-karol.kolacinski@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240404092238.26975-14-karol.kolacinski@intel.com> References: <20240404092238.26975-14-karol.kolacinski@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712223322; x=1743759322; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ABmW8SAql6Byg7IjKS5QYEz5/NygYaMBoqgkoxNlfoE=; b=gkMcLSt7me0Wk9EBokvvY3hiC64ui3im18+H5jKuqrEj/vLjy5C1eWZr h1NUmOqCMIX1GWrEMZI2bMl6OYtQ/pSomoRs4cenzhtITao+xf51s9/dD uslDz/XtttRvYiTGl2iTVszpHHZx58OsrCFxGHxubnKNk91n328n1JzmL CZCIT64GAiTLY92U96oOVtH9B64TU1Zaq5Wl3CBJ5DuoGtBNMbi2+/Y90 acQ1+P5bFgUBwW+0N1fQYcS/gITaMQHgGS2RQQYbVLQFCAdX5wJxIf5f9 o9par5HpCjSGmtZ6L0yWn4SHOPqRvRD7m4jRli/HyphlBvmlCfH2w1A8I A==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=gkMcLSt7 Subject: [Intel-wired-lan] [PATCH v5 iwl-next 06/12] ice: Introduce ice_get_base_incval() helper X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: netdev@vger.kernel.org, Arkadiusz Kubalewski , Karol Kolacinski , anthony.l.nguyen@intel.com, Przemek Kitszel , Jacob Keller Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Jacob Keller Add a new helper for getting base clock increment value for specific HW. Signed-off-by: Jacob Keller Reviewed-by: Przemek Kitszel Reviewed-by: Arkadiusz Kubalewski Signed-off-by: Karol Kolacinski --- V4 -> V5: Removed unused UNKNOWN_INCVAL_E82X drivers/net/ethernet/intel/ice/ice_ptp.c | 9 +-------- drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 12 ++++++++++++ 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 6899b331f322..824d3f17587c 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -7,8 +7,6 @@ #define E810_OUT_PROP_DELAY_NS 1 -#define UNKNOWN_INCVAL_E82X 0x100000000ULL - static const struct ptp_pin_desc ice_pin_desc_e810t[] = { /* name idx func chan */ { "GNSS", GNSS, PTP_PF_EXTTS, 0, { 0, } }, @@ -1210,12 +1208,7 @@ static u64 ice_base_incval(struct ice_pf *pf) struct ice_hw *hw = &pf->hw; u64 incval; - if (ice_is_e810(hw)) - incval = ICE_PTP_NOMINAL_INCVAL_E810; - else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) - incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); - else - incval = UNKNOWN_INCVAL_E82X; + incval = ice_get_base_incval(hw); dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", incval); diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index 5223e17d2806..d477d334b1d8 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -285,6 +285,18 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, unsigned long *caps); +static inline u64 ice_get_base_incval(struct ice_hw *hw) +{ + switch (hw->ptp.phy_model) { + case ICE_PHY_E810: + return ICE_PTP_NOMINAL_INCVAL_E810; + case ICE_PHY_E82X: + return ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); + default: + return 0; + } +} + #define PFTSYN_SEM_BYTES 4 #define ICE_PTP_CLOCK_INDEX_0 0x00