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Tue, 5 Mar 2024 17:07:54 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6600,9927,11003"; a="4085292" X-IronPort-AV: E=Sophos;i="6.06,205,1705392000"; d="scan'208";a="4085292" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2024 09:07:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,206,1705392000"; d="scan'208";a="14021223" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa003.fm.intel.com with ESMTP; 05 Mar 2024 09:07:38 -0800 Received: from fedora.igk.intel.com (Metan_eth.igk.intel.com [10.123.220.124]) by irvmail002.ir.intel.com (Postfix) with ESMTP id AEDE7381AA; Tue, 5 Mar 2024 14:48:02 +0000 (GMT) From: Mateusz Polchlopek To: intel-wired-lan@lists.osuosl.org Date: Tue, 5 Mar 2024 09:39:42 -0500 Message-Id: <20240305143942.23757-7-mateusz.polchlopek@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20240305143942.23757-1-mateusz.polchlopek@intel.com> References: <20240305143942.23757-1-mateusz.polchlopek@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709658475; x=1741194475; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mfVPlkDZyL7XfaKrP/G/OosZCKObphqD9SyqS/J4aTw=; b=X+EQ75Vx4FmUfntOCJKsr85GLAFaM4leKTMovfAP+Fm3PIGPt7va7VQw GFygV1Okonuyu0CZH6nz+pRryi0WYxhovH0Nf6j6G+d2kFXRLkrXb23og P/CsXx8NJao0fZaNvCNyK1+WzjDdBrQTlf05RTAX7ZAguiW28J2KPycRJ djQIoiGhsj8y6Bx//jxjPeFzFNDG6Xcqj/O5Plmp8JugWBF0/WMdUQR2y njlqtv8asA9XPvi4ovJ72n/omSkFQv+Estfhm9NwXBtg7PrHlZ9Ezpm+A GXiQVoKgaX09IVeB9Rr06+WFxGsDxXdHe5wu8jY3nIAAFXRF2IMO/KLPY w==; X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=X+EQ75Vx Subject: [Intel-wired-lan] [PATCH iwl-next v6 6/6] ice: Document tx_scheduling_layers parameter X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@lunn.ch, jiri@resnulli.us, michal.wilczynski@intel.com, Mateusz Polchlopek , netdev@vger.kernel.org, lukasz.czapnik@intel.com, victor.raj@intel.com, anthony.l.nguyen@intel.com, horms@kernel.org, przemyslaw.kitszel@intel.com, kuba@kernel.org Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Michal Wilczynski New driver specific parameter 'tx_scheduling_layers' was introduced. Describe parameter in the documentation. Signed-off-by: Michal Wilczynski Acked-by: Jakub Kicinski Co-developed-by: Mateusz Polchlopek Signed-off-by: Mateusz Polchlopek Reviewed-by: Jiri Pirko --- Documentation/networking/devlink/ice.rst | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst index 7f30ebd5debb..8fc8480e2d2b 100644 --- a/Documentation/networking/devlink/ice.rst +++ b/Documentation/networking/devlink/ice.rst @@ -21,6 +21,53 @@ Parameters * - ``enable_iwarp`` - runtime - mutually exclusive with ``enable_roce`` + * - ``tx_scheduling_layers`` + - permanent + - The ice hardware uses hierarchical scheduling for Tx with a fixed + number of layers in the scheduling tree. Each of them are decision + points. Root node represents a port, while all the leaves represent + the queues. This way of configuring the Tx scheduler allows features + like DCB or devlink-rate (documented below) to configure how much + bandwidth is given to any given queue or group of queues, enabling + fine-grained control because scheduling parameters can be configured + at any given layer of the tree. + + The default 9-layer tree topology was deemed best for most workloads, + as it gives an optimal ratio of performance to configurability. However, + for some specific cases, this 9-layer topology might not be desired. + One example would be sending traffic to queues that are not a multiple + of 8. Because the maximum radix is limited to 8 in 9-layer topology, + the 9th queue has a different parent than the rest, and it's given + more bandwidth credits. This causes a problem when the system is + sending traffic to 9 queues: + + | tx_queue_0_packets: 24163396 + | tx_queue_1_packets: 24164623 + | tx_queue_2_packets: 24163188 + | tx_queue_3_packets: 24163701 + | tx_queue_4_packets: 24163683 + | tx_queue_5_packets: 24164668 + | tx_queue_6_packets: 23327200 + | tx_queue_7_packets: 24163853 + | tx_queue_8_packets: 91101417 < Too much traffic is sent from 9th + + To address this need, you can switch to a 5-layer topology, which + changes the maximum topology radix to 512. With this enhancement, + the performance characteristic is equal as all queues can be assigned + to the same parent in the tree. The obvious drawback of this solution + is a lower configuration depth of the tree. + + Use the ``tx_scheduling_layer`` parameter with the devlink command + to change the transmit scheduler topology. To use 5-layer topology, + use a value of 5. For example: + $ devlink dev param set pci/0000:16:00.0 name tx_scheduling_layers + value 5 cmode permanent + Use a value of 9 to set it back to the default value. + + You must reboot the system for the selected topology to take effect. + + To verify that value has been set: + $ devlink dev param show pci/0000:16:00.0 name tx_scheduling_layers Info versions =============