| Message ID | 20240207161923.710014-4-arkadiusz.kubalewski@intel.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | ice: fix dpll data access on PF reset | expand |
> -----Original Message----- > From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of Arkadiusz Kubalewski > Sent: Wednesday, February 7, 2024 9:49 PM > To: intel-wired-lan@lists.osuosl.org > Cc: Bagnucki, Igor <igor.bagnucki@intel.com>; Kubalewski, Arkadiusz <arkadiusz.kubalewski@intel.com> > Subject: [Intel-wired-lan] [PATCH iwl-net 3/3] ice: fix pin phase adjust updates on PF reset > > Do not allow to set phase adjust value for a pin if PF reset is in > progress, this would cause confusing netlink extack errors as the firmware > cannot process the request properly during the reset time. > > Return (-EBUSY) and report extack error for the user who tries configure > pin phase adjust during the reset time. > > Test by looping execution of below steps until netlink error appears: > - perform PF reset > $ echo 1 > /sys/class/net/<ice PF>/device/reset > - change pin phase adjust value: > $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ > --do pin-set --json '{"id":0, "phase-adjust":1000}' > > Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") > Reviewed-by: Igor Bagnucki <igor.bagnucki@intel.com> > Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> > --- > drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +++ > 1 file changed, 3 insertions(+) > Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c index c102535d23db..54d13c0e4151 100644 --- a/drivers/net/ethernet/intel/ice/ice_dpll.c +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c @@ -963,6 +963,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, u8 flag, flags_en = 0; int ret; + if (ice_dpll_is_reset(pf, extack)) + return -EBUSY; + mutex_lock(&pf->dplls.lock); switch (type) { case ICE_DPLL_PIN_TYPE_INPUT:
Do not allow to set phase adjust value for a pin if PF reset is in progress, this would cause confusing netlink extack errors as the firmware cannot process the request properly during the reset time. Return (-EBUSY) and report extack error for the user who tries configure pin phase adjust during the reset time. Test by looping execution of below steps until netlink error appears: - perform PF reset $ echo 1 > /sys/class/net/<ice PF>/device/reset - change pin phase adjust value: $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do pin-set --json '{"id":0, "phase-adjust":1000}' Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") Reviewed-by: Igor Bagnucki <igor.bagnucki@intel.com> Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> --- drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +++ 1 file changed, 3 insertions(+)