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Tue, 31 Oct 2023 17:09:32 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp2.osuosl.org D020D41974 X-IronPort-AV: E=McAfee;i="6600,9927,10880"; a="387219667" X-IronPort-AV: E=Sophos;i="6.03,265,1694761200"; d="scan'208";a="387219667" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2023 10:09:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10880"; a="831114955" X-IronPort-AV: E=Sophos;i="6.03,265,1694761200"; d="scan'208";a="831114955" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by fmsmga004.fm.intel.com with ESMTP; 31 Oct 2023 10:09:30 -0700 From: Arkadiusz Kubalewski To: intel-wired-lan@lists.osuosl.org Date: Tue, 31 Oct 2023 18:06:54 +0100 Message-Id: <20231031170654.1115160-1-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698772172; x=1730308172; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=NAQBdRgcPYHgkLFFQjxz4QP8fnFuRuhVfu20c0mTXMY=; b=CSCAmhfcaqIUvfMLJ8QUymgd8VFRfJKWCEgofMNza7F45lB0Hqe5+pq0 oKES0ruaIhZsBuOFGo7k4FG2dIRiZTPVz34iEMIyth7oLGyxLuBSKmyl9 sHBE5A/VasPoqS2Fn5/P1vGRralrSvj6g77NUb2eJWy6KaVRvbSbsm6bk z+rfQ775zjXcuBFPNmLfMIQzQMjImMytokYETCvByyOMFC7vRp3G9VTpk PGsVEN3dEdBmDKFiN0/1x1wh7toKBczOOU9YvW3wYIiD2/Eg7UygS6OtY 3QamQVLolsDn04cxhe3Hr0IkXCmesCcYF8I5QUBk5Ex7h/8okt7dhlCEn A==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=CSCAmhfc Subject: [Intel-wired-lan] [PATCH iwl-next] ice: dpll: fix check for dpll input priority range X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Przemek Kitszel , Arkadiusz Kubalewski Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Supported priority value for input pins may differ with regard of NIC firmware version. E810T NICs with 3.20/4.00 FW versions would accept priority range 0-31, where firmware 4.10+ would support the range 0-9 and extra value of 255. Remove the in-range check as the driver has no information on supported values from the running firmware, let firmware decide if given value is correct and return extack error if the value is not supported. Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") Reviewed-by: Przemek Kitszel Signed-off-by: Arkadiusz Kubalewski Tested-by: Sunitha Mekala (A Contingent worker at Intel) --- drivers/net/ethernet/intel/ice/ice_dpll.c | 6 ------ drivers/net/ethernet/intel/ice/ice_dpll.h | 1 - 2 files changed, 7 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c index 607f534055b6..831ba6683962 100644 --- a/drivers/net/ethernet/intel/ice/ice_dpll.c +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c @@ -815,12 +815,6 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, struct ice_pf *pf = d->pf; int ret; - if (prio > ICE_DPLL_PRIO_MAX) { - NL_SET_ERR_MSG_FMT(extack, "prio out of supported range 0-%d", - ICE_DPLL_PRIO_MAX); - return -EINVAL; - } - mutex_lock(&pf->dplls.lock); ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); mutex_unlock(&pf->dplls.lock); diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h index bb32b6d88373..93172e93995b 100644 --- a/drivers/net/ethernet/intel/ice/ice_dpll.h +++ b/drivers/net/ethernet/intel/ice/ice_dpll.h @@ -6,7 +6,6 @@ #include "ice.h" -#define ICE_DPLL_PRIO_MAX 0xF #define ICE_DPLL_RCLK_NUM_MAX 4 /** ice_dpll_pin - store info about pins