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Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698236168; x=1729772168; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lgY1tWpSyruqp6eEq9OGvXKU7z8Nb6A1BlwBRG0hMbM=; b=P3IvlE3E1rA2HCwGxBSYy1hcXyY0wW1463Pk+xA3La1Hh3SWEBTQyTR6 KRo2gMHQcCLIIR3fqVsVQ7pKWeq/n14KbmVeR9ovMO1/P7Xe5X7yRRFiw 9KQnRCBn8uyKwiPgQ04pycjFYskIN1bfkTAcxUQpBrd4M29s6X5ZrK2tt +a1+id7eVtiX+47wU/9q8cRIjWO6aYC7ZgWke2Bvk1cg79Lw1CyhkXX5H +5BYoReEuhuxC5Wm7REnDrj+reo/tglgw9y6YbGnlkioPHS0CBTB/KycT k2RMKe43QDSPqFpuf2HvqHUiDPExUICBQAU7+IckntJZTpkd+Znr9UMM1 Q==; X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=P3IvlE3E Subject: [Intel-wired-lan] [PATCH iwl-next 05/10] ice: rename ice_ptp_tx_cfg_intr X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jacob Keller , Karol Kolacinski , anthony.l.nguyen@intel.com, jesse.brandeburg@intel.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Jacob Keller The ice_ptp_tx_cfg_intr() function sends a control queue message to configure the PHY timestamp interrupt block. This is a very similar name to a function which is used to configure the MAC Other Interrupt Cause Enable register. Rename this function to ice_ptp_cfg_phy_interrupt in order to make it more obvious to the reader what action it performs, and distinguish it from other similarly named functions. Signed-off-by: Jacob Keller Signed-off-by: Karol Kolacinski Reviewed-by: Jacob Keller --- drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index d4bc6dd0d76b..23e91da1b517 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -1316,14 +1316,14 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) } /** - * ice_ptp_tx_ena_intr - Enable or disable the Tx timestamp interrupt + * ice_ptp_cfg_phy_interrupt - Configure PHY interrupt settings * @pf: PF private structure * @ena: bool value to enable or disable interrupt * @threshold: Minimum number of packets at which intr is triggered * * Utility function to enable or disable Tx timestamp interrupt and threshold */ -static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) +static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold) { struct ice_hw *hw = &pf->hw; int err = 0; @@ -2484,8 +2484,8 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) struct ice_ptp *ptp = &pf->ptp; struct ice_hw *hw = &pf->hw; struct timespec64 ts; - int err, itr = 1; u64 time_diff; + int err; if (ptp->state != ICE_PTP_RESETTING) { if (ptp->state == ICE_PTP_READY) { @@ -2538,7 +2538,7 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) if (!ice_is_e810(hw)) { /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); + err = ice_ptp_cfg_phy_interrupt(pf, true, 1); if (err) goto err; } @@ -2792,7 +2792,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) { struct ice_hw *hw = &pf->hw; struct timespec64 ts; - int err, itr = 1; + int err; err = ice_ptp_init_phc(hw); if (err) { @@ -2835,7 +2835,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); + err = ice_ptp_cfg_phy_interrupt(pf, true, 1); if (err) goto err_exit; }