| Message ID | 20230808042352.2930822-1-sasha.neftin@intel.com |
|---|---|
| State | Accepted |
| Delegated to: | Anthony Nguyen |
| Headers | show |
| Series | [iwl-net,v2,1/1] igc: Fix the typo in the PTM Control macro | expand |
On 8/8/2023 07:23, Sasha Neftin wrote: > The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM > requests. The bit resolution of this field is six bits. That bit five was > missing in the mask. This patch comes to correct the typo in the > IGC_PTM_CTRL_SHRT_CYC macro. > > Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()") > Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> > --- > v1->v2: Fixed commit message > --- > drivers/net/ethernet/intel/igc/igc_defines.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Tested-by: Naama Meir <naamax.meir@linux.intel.com>
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 44a507029946..2f780cc90883 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -546,7 +546,7 @@ #define IGC_PTM_CTRL_START_NOW BIT(29) /* Start PTM Now */ #define IGC_PTM_CTRL_EN BIT(30) /* Enable PTM */ #define IGC_PTM_CTRL_TRIG BIT(31) /* PTM Cycle trigger */ -#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x2f) << 2) +#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2) #define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8) #define IGC_PTM_SHORT_CYC_DEFAULT 10 /* Default Short/interrupted cycle interval */
The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM requests. The bit resolution of this field is six bits. That bit five was missing in the mask. This patch comes to correct the typo in the IGC_PTM_CTRL_SHRT_CYC macro. Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()") Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> --- v1->v2: Fixed commit message --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)