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Sun, 30 Oct 2022 04:55:36 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6500,9779,10515"; a="335367896" X-IronPort-AV: E=Sophos;i="5.95,225,1661842800"; d="scan'208";a="335367896" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2022 21:55:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10515"; a="635707897" X-IronPort-AV: E=Sophos;i="5.95,225,1661842800"; d="scan'208";a="635707897" Received: from zulkifl3-ilbpg0.png.intel.com ([10.88.229.82]) by fmsmga007.fm.intel.com with ESMTP; 29 Oct 2022 21:55:15 -0700 From: Muhammad Husaini Zulkifli To: intel-wired-lan@osuosl.org Date: Sun, 30 Oct 2022 12:53:22 +0800 Message-Id: <20221030045324.25207-4-muhammad.husaini.zulkifli@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221030045324.25207-1-muhammad.husaini.zulkifli@intel.com> References: <20221030045324.25207-1-muhammad.husaini.zulkifli@intel.com> X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667105737; x=1698641737; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=AnZcd6iUXpGNJmg06Q9USZmJ1S79SOIaD3NVMOksIyU=; b=FQdawXDwbp08SxzspKwH8Y7s9t16bcmjZuhvbXvTav2+CsQS93QwQBOa gV1W0va3n0AeeRSlsE8AUvpXrRKZGVPw9sLvHfDoXyHSNA6cDPc0mQ0bw BstVDn+QtJ0nYt56d7ZaQ2aj2hGrd0xEwuRAnJPZUb7C08yfQbEIwfRve ukpzEaRxjVLX02l2NkYHNFOXQEgjaWcjZEg8EyqnKNavjl1sxr5LNfChE k0CbJpsvvN01fuiilVcZZm7qyFmHUnMX7AMfvIkpgZvKHpxiiyS9OkaY8 im7BMScE+XnXDvaVzZZhoivA8SRLjVYfhv/XAWUpjx3Z0II32KTMDRdNw w==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=FQdawXDw Subject: [Intel-wired-lan] [PATCH 3/5] igc: recalculate Qbv end_time by considering cycle time X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: muhammad.husaini.zulkifli@intel.com, tee.min.tan@linux.intel.com MIME-Version: 1.0 Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Tan Tee Min Qbv users can specify a cycle time that is not equal to the total GCL intervals. Hence, recalculation is necessary here to exclude the time interval that exceeds the cycle time. As those GCL which exceeds the cycle time will be truncated. According to IEEE Std. 802.1Q-2018 section 8.6.9.2, once the end of the list is reached, it will switch to the END_OF_CYCLE state and leave the gates in the same state until the next cycle is started. Signed-off-by: Tan Tee Min Signed-off-by: Muhammad Husaini Zulkifli Tested-by: Naama Meir --- drivers/net/ethernet/intel/igc/igc_main.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index b321e0b2ddbd..9784af3afc57 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -5948,6 +5948,21 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter, end_time += e->interval; + /* If any of the conditions below are true, we need to manually + * control the end time of the cycle. + * 1. Qbv users can specify a cycle time that is not equal + * to the total GCL intervals. Hence, recalculation is + * necessary here to exclude the time interval that + * exceeds the cycle time. + * 2. According to IEEE Std. 802.1Q-2018 section 8.6.9.2, + * once the end of the list is reached, it will switch + * to the END_OF_CYCLE state and leave the gates in the + * same state until the next cycle is started. + */ + if (end_time > adapter->cycle_time || + n + 1 == qopt->num_entries) + end_time = adapter->cycle_time; + for (i = 0; i < adapter->num_tx_queues; i++) { struct igc_ring *ring = adapter->tx_ring[i];