diff mbox series

[v1,1/1] igc: Add LPI counters

Message ID 20200604112516.44949-1-sasha.neftin@intel.com
State Accepted
Delegated to: Jeff Kirsher
Headers show
Series [v1,1/1] igc: Add LPI counters | expand

Commit Message

Sasha Neftin June 4, 2020, 11:25 a.m. UTC
Add EEE TX LPI and EEE RX LPI counters. A EEE TX LPI event
occurs when the transmitter enters EEE (IEEE 802.3az) LPI
state. A EEE RX LPI event ocuurs when the receiver detect
link partner entry into EEE(IEEE 802.3az) LPI state.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
---
 drivers/net/ethernet/intel/igc/igc_mac.c  | 2 ++
 drivers/net/ethernet/intel/igc/igc_regs.h | 2 ++
 2 files changed, 4 insertions(+)

Comments

Brown, Aaron F June 24, 2020, 1:05 a.m. UTC | #1
> From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of
> Sasha Neftin
> Sent: Thursday, June 4, 2020 4:25 AM
> To: intel-wired-lan@lists.osuosl.org
> Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Add LPI counters
> 
> Add EEE TX LPI and EEE RX LPI counters. A EEE TX LPI event
> occurs when the transmitter enters EEE (IEEE 802.3az) LPI
> state. A EEE RX LPI event ocuurs when the receiver detect
> link partner entry into EEE(IEEE 802.3az) LPI state.

Are these counters exposed anywhere I can view them?
Sasha Neftin June 24, 2020, 3:23 a.m. UTC | #2
On 6/24/2020 04:05, Brown, Aaron F wrote:
>> From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of
>> Sasha Neftin
>> Sent: Thursday, June 4, 2020 4:25 AM
>> To: intel-wired-lan@lists.osuosl.org
>> Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Add LPI counters
>>
>> Add EEE TX LPI and EEE RX LPI counters. A EEE TX LPI event
>> occurs when the transmitter enters EEE (IEEE 802.3az) LPI
>> state. A EEE RX LPI event ocuurs when the receiver detect
>> link partner entry into EEE(IEEE 802.3az) LPI state.
> 
> Are these counters exposed anywhere I can view them?
Just added relevant LPI registers. EEE support only in initial phase, 
many stuff will be added later.
>
Brown, Aaron F June 24, 2020, 4:09 a.m. UTC | #3
> From: Neftin, Sasha <sasha.neftin@intel.com>
> Sent: Tuesday, June 23, 2020 8:24 PM
> To: Brown, Aaron F <aaron.f.brown@intel.com>; intel-wired-
> lan@lists.osuosl.org
> Subject: Re: [Intel-wired-lan] [PATCH v1 1/1] igc: Add LPI counters
> 
> On 6/24/2020 04:05, Brown, Aaron F wrote:
> >> From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf
> Of
> >> Sasha Neftin
> >> Sent: Thursday, June 4, 2020 4:25 AM
> >> To: intel-wired-lan@lists.osuosl.org
> >> Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Add LPI counters
> >>
> >> Add EEE TX LPI and EEE RX LPI counters. A EEE TX LPI event
> >> occurs when the transmitter enters EEE (IEEE 802.3az) LPI
> >> state. A EEE RX LPI event ocuurs when the receiver detect
> >> link partner entry into EEE(IEEE 802.3az) LPI state.
> >
> > Are these counters exposed anywhere I can view them?
> Just added relevant LPI registers. EEE support only in initial phase,
> many stuff will be added later.
Ok, thanks.
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c
index bc077f230f17..f3f7717b6233 100644
--- a/drivers/net/ethernet/intel/igc/igc_mac.c
+++ b/drivers/net/ethernet/intel/igc/igc_mac.c
@@ -307,6 +307,8 @@  void igc_clear_hw_cntrs_base(struct igc_hw *hw)
 	rd32(IGC_ICRXDMTC);
 
 	rd32(IGC_RPTHC);
+	rd32(IGC_TLPIC);
+	rd32(IGC_RLPIC);
 	rd32(IGC_HGPTC);
 	rd32(IGC_HGORCL);
 	rd32(IGC_HGORCH);
diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h
index d53f49833db5..eb3e8e70501d 100644
--- a/drivers/net/ethernet/intel/igc/igc_regs.h
+++ b/drivers/net/ethernet/intel/igc/igc_regs.h
@@ -188,6 +188,8 @@ 
 #define IGC_ICTXQEC	0x04118  /* Interrupt Cause Tx Queue Empty Count */
 #define IGC_ICTXQMTC	0x0411C  /* Interrupt Cause Tx Queue Min Thresh Count */
 #define IGC_RPTHC	0x04104  /* Rx Packets To Host */
+#define IGC_TLPIC	0x04148  /* EEE Tx LPI Count */
+#define IGC_RLPIC	0x0414C  /* EEE Rx LPI Count */
 #define IGC_HGPTC	0x04118  /* Host Good Packets Tx Count */
 #define IGC_RXDMTC	0x04120  /* Rx Descriptor Minimum Threshold Count */
 #define IGC_HGORCL	0x04128  /* Host Good Octets Received Count Low */