[net-next,0/2] ptp: add control over HW timestamp latch point

Message ID	20241021141955.1466979-1-arkadiusz.kubalewski@intel.com
Headers	show Return-Path: <intel-wired-lan-bounces@osuosl.org> Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=198.175.65.20; helo=mgamail.intel.com; envelope-from=arkadiusz.kubalewski@intel.com; receiver=<UNKNOWN> DMARC-Filter: OpenDMARC Filter v1.4.2 smtp4.osuosl.org 7C850402D6 From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org Cc: anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, richardcochran@gmail.com, Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> Date: Mon, 21 Oct 2024 16:19:53 +0200 Message-Id: <20241021141955.1466979-1-arkadiusz.kubalewski@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729520681; x=1761056681; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=pc4NBde+fXjBXx1YyOAYXQyIKmBbSnOydn+XQMOwhH4=; b=N3OdEKR+90K5s9L5eM0Ohlm+eP1czrB8QzgywCipS3fqjk+bwLxBTjZf KR68mylkt/WuTZmql063Qm6Qoc+q0ZsyqbcB/nytqkehzCtv/tclVbXpY eRm8I7x+r+WozpmILtcDp1+1LTEnV9DHXVwzKWs461AdTIs4rNNGgkC5Z BxPz5QtmbcrPlGIcl/y8mNWnNK0n/8k9L1FSfV4znZBe4IiA/jo+u9IHK OI71O8PMtPPa2AZyjyJyulQjAdrej8o6fEBU/1K7SJvjQsBCYZwpLOjIw vzIaa//qrtE9YTiAhmWUKW6GyGK27xQXqu0LCIuMlEkVYRiMSvZVEtsTg Q==; X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=N3OdEKR+ Subject: [Intel-wired-lan] [PATCH net-next 0/2] ptp: add control over HW timestamp latch point Precedence: list Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" <intel-wired-lan-bounces@osuosl.org>
Series	ptp: add control over HW timestamp latch point \| expand [net-next,0/2] ptp: add control over HW timestamp latch point [net-next,1/2] ptp: add control over HW timestamp latch point [net-next,2/2] ice: ptp: add control over HW timestamp latch point

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20241021141955.1466979-1-arkadiusz.kubalewski@intel.com

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From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
 intel-wired-lan@lists.osuosl.org
Cc: anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
 davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
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 Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Date: Mon, 21 Oct 2024 16:19:53 +0200
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Subject: [Intel-wired-lan] [PATCH net-next 0/2] ptp: add control over HW
 timestamp latch point
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Series

ptp: add control over HW timestamp latch point | expand

Message

Kubalewski, Arkadiusz Oct. 21, 2024, 2:19 p.m. UTC

HW support of PTP/timesync solutions in network PHY chips can be
achieved with two different approaches, the timestamp maybe latched
either in the beginning or after the Start of Frame Delimiter (SFD) [1].

Allow ptp device drivers to provide user with control over the timestamp
latch point.

[1] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf

Arkadiusz Kubalewski (2):
  ptp: add control over HW timestamp latch point
  ice: ptp: add control over HW timestamp latch point

 Documentation/ABI/testing/sysfs-ptp         | 12 +++++
 drivers/net/ethernet/intel/ice/ice_ptp.c    | 46 +++++++++++++++++
 drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 57 +++++++++++++++++++++
 drivers/net/ethernet/intel/ice/ice_ptp_hw.h |  2 +
 drivers/ptp/ptp_sysfs.c                     | 44 ++++++++++++++++
 include/linux/ptp_clock_kernel.h            | 29 +++++++++++
 6 files changed, 190 insertions(+)