From patchwork Fri Aug 7 17:37:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John David Anglin X-Patchwork-Id: 505212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 31DD9140284 for ; Sat, 8 Aug 2015 03:37:47 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b=Kcoba2gx; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:message-id:from:mime-version:content-type:date :subject:cc:to; q=dns; s=default; b=SWi5+kCLaA+d34n717HKvGws7h/A SQhdUeWARmhpJ1o4ll8q3J9M/FtBlqdmeNS8efkd5ZAtExgp+lBQr7LPhPr2fCRK xmu6p/Jojicbvp5IuD1v3eM2Y9c36Oel/XjevG10lV/i+xS7piyLvViHeXw99uyG vAxy5xixGNDTkW4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:message-id:from:mime-version:content-type:date :subject:cc:to; s=default; bh=GQkq0Qb1B09/8RDt+rmw4+8QnKU=; b=Kc oba2gx4qhYNzjQYKLzbJVpwoyErr8b3FHKB+GJsfbCI8RXqIgMiqnU31vfXsSZVj fuCVYuJxXZshhbARLcn53AvPBgRw62F8LeM+Y3u5ufo2AGiOQOaABSCcexSCuMR5 UHpmiS+ShjGl2j+4cpsBmauipbIz4ulrdV53lg29Q= Received: (qmail 35210 invoked by alias); 7 Aug 2015 17:37:42 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 35187 invoked by uid 89); 7 Aug 2015 17:37:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: BLU004-OMC1S17.hotmail.com X-TMN: [lyrYcwnVDy/5+SW1/1QYH8tZvKW+Xz7Y] Message-ID: From: John David Anglin MIME-Version: 1.0 (Apple Message framework v1085) Date: Fri, 7 Aug 2015 13:37:35 -0400 Subject: [PATCH] hppa: Fix reload error compiling nss/getXXbyYY.c on hppa CC: Carlos O'Donell , Mike Frysinger , Helge Deller To: GNU C Library The attached change fixes 18787. As noted in the bug, the asm operands need to be copied to register variables to avoid operand reloads in the principal asm of the macro. See the arm implementation for reference. Build tested on trunk with gcc-4.8. Similar patch has been tested with 2.19 on Debian hppa-unknown-linux-gnu. Please commit if okay. Thanks, Dave --- John David Anglin dave.anglin@bell.net 2015-08-07 John David Anglin [BZ 18787] * sysdeps/unix/sysv/linux/hppa/bits/atomic.h (_LWS_CLOBBER): Revise clobber registers. (atomic_compare_and_exchange_val_acq): Use register asms to assign operand registers. Use register %r20 for EAGAIN and EDEADLOCK checks. Cast return to __typeof (oldval). diff --git a/sysdeps/unix/sysv/linux/hppa/bits/atomic.h b/sysdeps/unix/sysv/linux/hppa/bits/atomic.h index abde83e..d3a7964 100644 --- a/sysdeps/unix/sysv/linux/hppa/bits/atomic.h +++ b/sysdeps/unix/sysv/linux/hppa/bits/atomic.h @@ -56,42 +56,41 @@ typedef uintmax_t uatomic_max_t; #define _LWS "0xb0" #define _LWS_CAS "0" /* Note r31 is the link register. */ -#define _LWS_CLOBBER "r1", "r26", "r25", "r24", "r23", "r22", "r21", "r20", "r28", "r31", "memory" +#define _LWS_CLOBBER "r1", "r23", "r22", "r20", "r31", "memory" /* String constant for -EAGAIN. */ #define _ASM_EAGAIN "-11" /* String constant for -EDEADLOCK. */ #define _ASM_EDEADLOCK "-45" #if __ASSUME_LWS_CAS -/* The only basic operation needed is compare and exchange. */ +/* The only basic operation needed is compare and exchange. The mem + pointer must be word aligned. */ # define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \ ({ \ - volatile int lws_errno; \ - __typeof__ (*mem) lws_ret; \ - asm volatile( \ + register long lws_errno asm("r21"); \ + register unsigned long lws_ret asm("r28"); \ + register unsigned long lws_mem asm("r26") = (unsigned long)(mem); \ + register unsigned long lws_old asm("r25") = (unsigned long)(oldval);\ + register unsigned long lws_new asm("r24") = (unsigned long)(newval);\ + __asm__ __volatile__( \ "0: \n\t" \ - "copy %2, %%r26 \n\t" \ - "copy %3, %%r25 \n\t" \ - "copy %4, %%r24 \n\t" \ "ble " _LWS "(%%sr2, %%r0) \n\t" \ "ldi " _LWS_CAS ", %%r20 \n\t" \ - "ldi " _ASM_EAGAIN ", %%r24 \n\t" \ - "cmpb,=,n %%r24, %%r21, 0b \n\t" \ + "ldi " _ASM_EAGAIN ", %%r20 \n\t" \ + "cmpb,=,n %%r20, %%r21, 0b \n\t" \ "nop \n\t" \ - "ldi " _ASM_EDEADLOCK ", %%r25 \n\t" \ - "cmpb,=,n %%r25, %%r21, 0b \n\t" \ + "ldi " _ASM_EDEADLOCK ", %%r20 \n\t" \ + "cmpb,=,n %%r20, %%r21, 0b \n\t" \ "nop \n\t" \ - "stw %%r28, %0 \n\t" \ - "stw %%r21, %1 \n\t" \ - : "=m" (lws_ret), "=m" (lws_errno) \ - : "r" (mem), "r" (oldval), "r" (newval) \ + : "=r" (lws_ret), "=r" (lws_errno) \ + : "r" (lws_mem), "r" (lws_old), "r" (lws_new) \ : _LWS_CLOBBER \ ); \ \ if(lws_errno == -EFAULT || lws_errno == -ENOSYS) \ ABORT_INSTRUCTION; \ \ - lws_ret; \ + (__typeof (oldval)) lws_ret; \ }) # define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \