diff mbox series

[1/4] x86: Add missing switch/case fall-through markers to init_cpu_features

Message ID 6604c632eeb87200dc58d36086bdd044b69e11f3.1722604821.git.fweimer@redhat.com
State New
Headers show
Series Turn on -Wimplicit-fallthrough | expand

Commit Message

Florian Weimer Aug. 2, 2024, 1:22 p.m. UTC 
The commits introducing these fall-throughs intended them to
happen.
---
 sysdeps/x86/cpu-features.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Noah Goldstein Aug. 2, 2024, 2:18 p.m. UTC | #1 
On Fri, Aug 2, 2024 at 9:22 PM Florian Weimer <fweimer@redhat.com> wrote:
>
> The commits introducing these fall-throughs intended them to
> happen.
> ---
>  sysdeps/x86/cpu-features.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> index c096dd390a..18ed008040 100644
> --- a/sysdeps/x86/cpu-features.c
> +++ b/sysdeps/x86/cpu-features.c
> @@ -879,6 +879,7 @@ init_cpu_features (struct cpu_features *cpu_features)
>                      non-temporal on all Skylake servers. */
>               cpu_features->preferred[index_arch_Avoid_Non_Temporal_Memset]
>                   |= bit_arch_Avoid_Non_Temporal_Memset;
> +             /* fallthrough */
>             case INTEL_BIGCORE_COMETLAKE:
>             case INTEL_BIGCORE_SKYLAKE:
>             case INTEL_BIGCORE_KABYLAKE:
> @@ -1073,6 +1074,7 @@ https://www.intel.com/content/www/us/en/support/articles/000059422/processors.ht
>               /* Yongfeng and Shijidadao mircoarch tuning.  */
>             case 0x5b:
>               cpu_features->cachesize_non_temporal_divisor = 2;
> +             /* fallthrough */
>             case 0x6b:
>               cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load]
>                   &= ~bit_arch_AVX_Fast_Unaligned_Load;
> --
> 2.45.2
>
>

LGTM
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
diff mbox series

Patch

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index c096dd390a..18ed008040 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -879,6 +879,7 @@  init_cpu_features (struct cpu_features *cpu_features)
 		     non-temporal on all Skylake servers. */
 	      cpu_features->preferred[index_arch_Avoid_Non_Temporal_Memset]
 		  |= bit_arch_Avoid_Non_Temporal_Memset;
+	      /* fallthrough */
 	    case INTEL_BIGCORE_COMETLAKE:
 	    case INTEL_BIGCORE_SKYLAKE:
 	    case INTEL_BIGCORE_KABYLAKE:
@@ -1073,6 +1074,7 @@  https://www.intel.com/content/www/us/en/support/articles/000059422/processors.ht
 	      /* Yongfeng and Shijidadao mircoarch tuning.  */
 	    case 0x5b:
 	      cpu_features->cachesize_non_temporal_divisor = 2;
+	      /* fallthrough */
 	    case 0x6b:
 	      cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load]
 		  &= ~bit_arch_AVX_Fast_Unaligned_Load;