diff mbox series

[v6,4/4] x86: Tune 'Saltwell' microarch the same was a 'Bonnell'

Message ID 20230510003336.637851-4-goldstein.w.n@gmail.com
State New
Headers show
Series [v6,1/4] x86: Increase `non_temporal_threshold` to roughly `sizeof_L3 / 4` | expand

Commit Message

Noah Goldstein May 10, 2023, 12:33 a.m. UTC 
Saltwell is just a die shrink of Bonnell, so the same
micro-architectural optimization preferences apply.
---
 sysdeps/x86/cpu-features.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

H.J. Lu May 10, 2023, 10:04 p.m. UTC | #1 
On Tue, May 9, 2023 at 5:34 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> Saltwell is just a die shrink of Bonnell, so the same
> micro-architectural optimization preferences apply.
> ---
>  sysdeps/x86/cpu-features.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> index 4cc1cd9fed..517b1be34c 100644
> --- a/sysdeps/x86/cpu-features.c
> +++ b/sysdeps/x86/cpu-features.c
> @@ -678,7 +678,9 @@ init_cpu_features (struct cpu_features *cpu_features)
>               break;
>
>               /* Unaligned load versions are faster than SSSE3
> -                    on Airmont, Silvermont, Goldmont, and Goldmont Plus.  */
> +                    on Saltwell, Airmont, Silvermont, Goldmont, and Goldmont
> +             Plus.  */
> +           case INTEL_ATOM_SALTWELL:

It should be grouped with Bonnell.

>             case INTEL_ATOM_AIRMONT:
>             case INTEL_ATOM_SILVERMONT:
>             case INTEL_ATOM_GOLDMONT:
> @@ -710,7 +712,6 @@ init_cpu_features (struct cpu_features *cpu_features)
>               /* Default tuned atom microarch.  */
>             case INTEL_ATOM_SIERRAFOREST:
>             case INTEL_ATOM_GRANDRIDGE:
> -           case INTEL_ATOM_SALTWELL:
>               goto default_tuning;
>
>               /* Bigcore Tuning.  */
> --
> 2.34.1
>
Noah Goldstein May 10, 2023, 10:12 p.m. UTC | #2 
On Wed, May 10, 2023 at 5:04 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Tue, May 9, 2023 at 5:34 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> >
> > Saltwell is just a die shrink of Bonnell, so the same
> > micro-architectural optimization preferences apply.
> > ---
> >  sysdeps/x86/cpu-features.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> > index 4cc1cd9fed..517b1be34c 100644
> > --- a/sysdeps/x86/cpu-features.c
> > +++ b/sysdeps/x86/cpu-features.c
> > @@ -678,7 +678,9 @@ init_cpu_features (struct cpu_features *cpu_features)
> >               break;
> >
> >               /* Unaligned load versions are faster than SSSE3
> > -                    on Airmont, Silvermont, Goldmont, and Goldmont Plus.  */
> > +                    on Saltwell, Airmont, Silvermont, Goldmont, and Goldmont
> > +             Plus.  */
> > +           case INTEL_ATOM_SALTWELL:
>
> It should be grouped with Bonnell.
>
Done.
> >             case INTEL_ATOM_AIRMONT:
> >             case INTEL_ATOM_SILVERMONT:
> >             case INTEL_ATOM_GOLDMONT:
> > @@ -710,7 +712,6 @@ init_cpu_features (struct cpu_features *cpu_features)
> >               /* Default tuned atom microarch.  */
> >             case INTEL_ATOM_SIERRAFOREST:
> >             case INTEL_ATOM_GRANDRIDGE:
> > -           case INTEL_ATOM_SALTWELL:
> >               goto default_tuning;
> >
> >               /* Bigcore Tuning.  */
> > --
> > 2.34.1
> >
>
>
> --
> H.J.
diff mbox series

Patch

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 4cc1cd9fed..517b1be34c 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -678,7 +678,9 @@  init_cpu_features (struct cpu_features *cpu_features)
 	      break;
 
 	      /* Unaligned load versions are faster than SSSE3
-		     on Airmont, Silvermont, Goldmont, and Goldmont Plus.  */
+		     on Saltwell, Airmont, Silvermont, Goldmont, and Goldmont
+             Plus.  */
+	    case INTEL_ATOM_SALTWELL:
 	    case INTEL_ATOM_AIRMONT:
 	    case INTEL_ATOM_SILVERMONT:
 	    case INTEL_ATOM_GOLDMONT:
@@ -710,7 +712,6 @@  init_cpu_features (struct cpu_features *cpu_features)
 	      /* Default tuned atom microarch.  */
 	    case INTEL_ATOM_SIERRAFOREST:
 	    case INTEL_ATOM_GRANDRIDGE:
-	    case INTEL_ATOM_SALTWELL:
 	      goto default_tuning;
 
 	      /* Bigcore Tuning.  */