From patchwork Fri Mar 24 12:10:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Ramsay X-Patchwork-Id: 1760727 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=rLod90Cc; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pjgyx5Bh2z1yXq for ; Fri, 24 Mar 2023 23:10:49 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 97B023850876 for ; Fri, 24 Mar 2023 12:10:47 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 97B023850876 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1679659847; bh=RBzmaZCgJ/6FKkpenAwZa8JNCRvGKkqJOe8/++iIF8o=; h=To:CC:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=rLod90CcUK8aP9mGMJiCtqPtcozHdkzWDN/q2VevFKfSc7U+i4rtPLYDaEOH2oNYv zMZk8jT9jL55tL8NM1ItSRGkZ+Y8gUjC1EqVvyj+a/spsfmngbmZRSLob3jUjkdREB dP3UnIZyBz678dKz8UonQ5kkB5m6ts0FyZpGgQNM= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from EUR02-AM0-obe.outbound.protection.outlook.com (mail-am0eur02on2050.outbound.protection.outlook.com [40.107.247.50]) by sourceware.org (Postfix) with ESMTPS id 4E87D3858CDA for ; Fri, 24 Mar 2023 12:10:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4E87D3858CDA Received: from DB6PR0202CA0047.eurprd02.prod.outlook.com (2603:10a6:4:a5::33) by AS2PR08MB10294.eurprd08.prod.outlook.com (2603:10a6:20b:62f::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.38; Fri, 24 Mar 2023 12:10:24 +0000 Received: from DBAEUR03FT064.eop-EUR03.prod.protection.outlook.com (2603:10a6:4:a5:cafe::ce) by DB6PR0202CA0047.outlook.office365.com (2603:10a6:4:a5::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.38 via Frontend Transport; Fri, 24 Mar 2023 12:10:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DBAEUR03FT064.mail.protection.outlook.com (100.127.143.3) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6222.22 via Frontend Transport; Fri, 24 Mar 2023 12:10:23 +0000 Received: ("Tessian outbound 945aec65ec65:v136"); Fri, 24 Mar 2023 12:10:23 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: fad0e051979adf1d X-CR-MTA-TID: 64aa7808 Received: from 5bfb8ac14a54.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id D0A17959-644C-4F36-86B1-3830D66FC724.1; Fri, 24 Mar 2023 12:10:16 +0000 Received: from EUR05-VI1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 5bfb8ac14a54.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Fri, 24 Mar 2023 12:10:16 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=cJtLX9P9z5GqPXis0cP4sLYNy/eMDqRAlHiP+1bdwbjfppt1uezqNmtuIs6SQQJEb2Kjbn42lXh40u/H2kTKgsoOqFm2xHEzlBqomrTkwxuvBjWZveXhrHJnUXdZohRI59cNs1C+FtFudzAiL8AzdnkoH9hlUwLaVAwfJBRc2cUbjRPpqK6NoFgFfEkguJwTwXe9LVn1/IQ+bmQLyKxVYbLXKpibs7DeQKnuqzl61qcGq/Bex4HaSfaZ3eScRxyVBZuHKQM6+MVNe4FPSPFBPBUDp5EK6rUYF0wYlIOxPTYue6K4cyXxOfR3y1L6SRPj7g7xoo0JznzyzTep2kD7iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RBzmaZCgJ/6FKkpenAwZa8JNCRvGKkqJOe8/++iIF8o=; b=oFc23n33jl/ZoqR932OvDsQ7H5N6Y8x5FeS331GDZuSZVMxCe5gFpZwMhnrXks3kQaeR+FkYFt10Afx/A6/Ne7Iks1gn+fQv30gOxkPcHBe7CPoiSUMKCJJ2hhzUp0HfVD3G0y0MQwy56BqC6ex8P6SKG9zIa0BGLvkee5bWRtinjmM4s/naRNP4VozrDIs1yjto4uSC3maxBy76FCCTzHblDHtYmI7p2MXTAczXBuHfr+rpAPucJxfUXO9SMF5bxE5FkY+g1+muACE9IIzwwf7TWDpTu+bHeQ0TQvzMUrnOrfa2H4f9/c0GW1UXoeUWDAKiIFUG/y2C+0e1kV0QZA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=sourceware.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none Received: from FR3P281CA0068.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:4b::15) by AS2PR08MB9245.eurprd08.prod.outlook.com (2603:10a6:20b:59f::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.38; Fri, 24 Mar 2023 12:10:13 +0000 Received: from VI1EUR03FT011.eop-EUR03.prod.protection.outlook.com (2603:10a6:d10:4b:cafe::88) by FR3P281CA0068.outlook.office365.com (2603:10a6:d10:4b::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6254.9 via Frontend Transport; Fri, 24 Mar 2023 12:10:13 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by VI1EUR03FT011.mail.protection.outlook.com (100.127.144.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6254.9 via Frontend Transport; Fri, 24 Mar 2023 12:10:13 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 24 Mar 2023 12:10:12 +0000 Received: from vcn-man-apps.manchester.arm.com (10.32.108.22) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.17 via Frontend Transport; Fri, 24 Mar 2023 12:10:12 +0000 To: CC: Joe Ramsay Subject: [PATCH 1/2] benchtests: Move libmvec benchtest inputs to benchtests directory Date: Fri, 24 Mar 2023 12:10:10 +0000 Message-ID: <20230324121011.629-1-Joe.Ramsay@arm.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VI1EUR03FT011:EE_|AS2PR08MB9245:EE_|DBAEUR03FT064:EE_|AS2PR08MB10294:EE_ X-MS-Office365-Filtering-Correlation-Id: 806f7944-1a41-43c8-6d75-08db2c60bf26 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: N54LnjgA+BHdI2i5mPhM94cDAEZMxoQ6EOzaHAn9JXv3Fzfld0b8IYFIh0zRpJFCbNA8de+ZpKfyvlcYzYo+12kYQHuWRJUeAPPsS56lWTdOdBXCb3xqNqbED5AuAdT7M9+17xH9yYsBpj1tdvgZGSxQRu9iE/0ag/kn2vWCajocxSjSmgaKyoHCK5vzA+LE6CeN3v8LWzSHlBYbtoi71VaWZb1hG3hb8SUsQjbQYgnPxnT/b+tGJ4mnrJeCoCNcnmbtrXhhsJ0HQ1IbvrVABk5CBZVuYeXK6TCisG2yic1UWnbgGIVEopajWdh+nvC2Bh8tcuKEVxYZoGq1YhO5iCa0arKWrTryyeIUdwQWabPxTiZlsEUThA5N15VaxbUPpVb63v0L+Uf4gO5TpdmLH1mDjJlvVI+1JcnMNAYYd2r9bW5UGzoo0Xljdj2QlHWzypQPBOtU0nqP1Gli1A8W+JKLMASjjLUBWTFpjIA4AxjWXzgxV7c4qf8PnlS1Vp7f2x6Gr0ekUqKCdtavd7Au3h14kzz+A+RBOVnfSHrnjKrMfAoy7gk1M4EN4vCAL65qptUfEZpLRbwBAmz+EH+y+3JJ79oQY/t1SuV2yTEvSTGHk8g6XMnrefSLNGLSGQy1bziUXX5dWaqJZHuKyFSD5MykFWnDoriByekt8p3fz93LObjO0ZNzgze+OT5G6HfxjEk0cQwicvCxDdgp7jDFm/LkUwj1KaWOwWgpkeIFFII= X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:nebula.arm.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230025)(4636009)(376002)(39860400002)(346002)(136003)(396003)(451199018)(46966006)(36840700001)(40470700004)(4326008)(8676002)(5660300002)(41300700001)(2906002)(40460700003)(356005)(82740400003)(81166007)(86362001)(36756003)(6916009)(36860700001)(7696005)(30864003)(26005)(478600001)(70586007)(70206006)(316002)(82310400005)(40480700001)(8936002)(1076003)(426003)(83380400001)(47076005)(336012)(2616005)(186003)(36900700001); DIR:OUT; SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB9245 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DBAEUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 18b77efc-220b-4a40-f4c5-08db2c60b904 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tpHMlBgfXnn3mTD/3CBUiQ7qy/VSf27pCgffvIAJDHe/HicJbxvO5umO+gQgJesIaNNC601oyoJgCEvKstrD2YA/qXVJvrqvWV7nmcpJbyMq/pmTSQ43/kY+YJomMjGGvLRP7eJlyNuD2z8pHz0O3AhMqxelIaXOppHtmsrZAuUtPqfS5ILNthsSOOWCRM57SssKCF/rIbk+CPKpTFICLcOCPBt1GlbUBrpVXR+Oau7TEYvrpXqMYP8QgOA9+54M8YAyYCSFMLTEX1h0xfGBzitqraRcPlzscZ8o98QXJRJUObk3AeeEPbbQMdshJuwwbGRqee5Yr183qsSLgmOmMLuumJohPVc2BiXsMSBqorWsh1z2HmgXMCMNXo4AAze8mm+W/nedrY/o66pMZvM/5HzOlUiwDNsMQQmu2UVussPf/shOhtLok8vcSioe2rfRSRm4xRhTfjkRi7zcpmqtbpYIZtN63PVzPflgecd8q8lRurv0vwMUq1buUhtrGqcjYLEPz0jEdhKN6BFzpELjMXKWeuI+o/2C5Uq+tTcsa756oHInQvBZSTuxJyb7xcklvk55LFymCvDvUPlyDzs5QhyQ1psPjzER3qotb7f+iHPmiEEH8mSvz8hCcSFGvyAGtVdfL5XUwpPMPtGNoLgb8hBP2KuO/E9Oj0ajifTnZaHDuJpTOHJsndI4SKpKX4lBmXKsemC+OEUSCZeAM4p6jg== X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230025)(4636009)(39860400002)(136003)(346002)(396003)(376002)(451199018)(46966006)(40470700004)(36840700001)(41300700001)(5660300002)(70206006)(4326008)(70586007)(8676002)(8936002)(30864003)(6916009)(7696005)(478600001)(316002)(2906002)(40480700001)(186003)(1076003)(26005)(82740400003)(47076005)(40460700003)(81166007)(426003)(336012)(83380400001)(2616005)(36860700001)(36756003)(82310400005)(86362001); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2023 12:10:23.8193 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 806f7944-1a41-43c8-6d75-08db2c60bf26 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB10294 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Joe Ramsay via Libc-alpha From: Joe Ramsay Reply-To: Joe Ramsay Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" This allows other targets to use the same inputs for their own libmvec microbenchmarks without having to duplicate them in their own subdirectory. Reviewed-by: Szabolcs Nagy --- .../fpu/libmvec-acos-inputs => benchtests/libmvec/acos-inputs | 0 .../fpu/libmvec-acosf-inputs => benchtests/libmvec/acosf-inputs | 0 .../fpu/libmvec-acosh-inputs => benchtests/libmvec/acosh-inputs | 0 .../libmvec-acoshf-inputs => benchtests/libmvec/acoshf-inputs | 0 .../fpu/libmvec-asin-inputs => benchtests/libmvec/asin-inputs | 0 .../fpu/libmvec-asinf-inputs => benchtests/libmvec/asinf-inputs | 0 .../fpu/libmvec-asinh-inputs => benchtests/libmvec/asinh-inputs | 0 .../libmvec-asinhf-inputs => benchtests/libmvec/asinhf-inputs | 0 .../fpu/libmvec-atan-inputs => benchtests/libmvec/atan-inputs | 0 .../fpu/libmvec-atan2-inputs => benchtests/libmvec/atan2-inputs | 0 .../libmvec-atan2f-inputs => benchtests/libmvec/atan2f-inputs | 0 .../fpu/libmvec-atanf-inputs => benchtests/libmvec/atanf-inputs | 0 .../fpu/libmvec-atanh-inputs => benchtests/libmvec/atanh-inputs | 0 .../libmvec-atanhf-inputs => benchtests/libmvec/atanhf-inputs | 0 .../fpu/libmvec-cbrt-inputs => benchtests/libmvec/cbrt-inputs | 0 .../fpu/libmvec-cbrtf-inputs => benchtests/libmvec/cbrtf-inputs | 0 .../fpu/libmvec-cos-inputs => benchtests/libmvec/cos-inputs | 0 .../fpu/libmvec-cosf-inputs => benchtests/libmvec/cosf-inputs | 0 .../fpu/libmvec-cosh-inputs => benchtests/libmvec/cosh-inputs | 0 .../fpu/libmvec-coshf-inputs => benchtests/libmvec/coshf-inputs | 0 .../fpu/libmvec-erf-inputs => benchtests/libmvec/erf-inputs | 0 .../fpu/libmvec-erfc-inputs => benchtests/libmvec/erfc-inputs | 0 .../fpu/libmvec-erfcf-inputs => benchtests/libmvec/erfcf-inputs | 0 .../fpu/libmvec-erff-inputs => benchtests/libmvec/erff-inputs | 0 .../fpu/libmvec-exp-inputs => benchtests/libmvec/exp-inputs | 0 .../fpu/libmvec-exp10-inputs => benchtests/libmvec/exp10-inputs | 0 .../libmvec-exp10f-inputs => benchtests/libmvec/exp10f-inputs | 0 .../fpu/libmvec-exp2-inputs => benchtests/libmvec/exp2-inputs | 0 .../fpu/libmvec-exp2f-inputs => benchtests/libmvec/exp2f-inputs | 0 .../fpu/libmvec-expf-inputs => benchtests/libmvec/expf-inputs | 0 .../fpu/libmvec-expm1-inputs => benchtests/libmvec/expm1-inputs | 0 .../libmvec-expm1f-inputs => benchtests/libmvec/expm1f-inputs | 0 .../fpu/libmvec-hypot-inputs => benchtests/libmvec/hypot-inputs | 0 .../libmvec-hypotf-inputs => benchtests/libmvec/hypotf-inputs | 0 .../fpu/libmvec-log-inputs => benchtests/libmvec/log-inputs | 0 .../fpu/libmvec-log10-inputs => benchtests/libmvec/log10-inputs | 0 .../libmvec-log10f-inputs => benchtests/libmvec/log10f-inputs | 0 .../fpu/libmvec-log1p-inputs => benchtests/libmvec/log1p-inputs | 0 .../libmvec-log1pf-inputs => benchtests/libmvec/log1pf-inputs | 0 .../fpu/libmvec-log2-inputs => benchtests/libmvec/log2-inputs | 0 .../fpu/libmvec-log2f-inputs => benchtests/libmvec/log2f-inputs | 0 .../fpu/libmvec-logf-inputs => benchtests/libmvec/logf-inputs | 0 .../fpu/libmvec-pow-inputs => benchtests/libmvec/pow-inputs | 0 .../fpu/libmvec-powf-inputs => benchtests/libmvec/powf-inputs | 0 .../fpu/libmvec-sin-inputs => benchtests/libmvec/sin-inputs | 0 .../fpu/libmvec-sinf-inputs => benchtests/libmvec/sinf-inputs | 0 .../fpu/libmvec-sinh-inputs => benchtests/libmvec/sinh-inputs | 0 .../fpu/libmvec-sinhf-inputs => benchtests/libmvec/sinhf-inputs | 0 .../fpu/libmvec-tan-inputs => benchtests/libmvec/tan-inputs | 0 .../fpu/libmvec-tanf-inputs => benchtests/libmvec/tanf-inputs | 0 .../fpu/libmvec-tanh-inputs => benchtests/libmvec/tanh-inputs | 0 .../fpu/libmvec-tanhf-inputs => benchtests/libmvec/tanhf-inputs | 0 sysdeps/x86_64/fpu/scripts/bench_libmvec.py | 2 +- 53 files changed, 1 insertion(+), 1 deletion(-) rename sysdeps/x86_64/fpu/libmvec-acos-inputs => benchtests/libmvec/acos-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-acosf-inputs => benchtests/libmvec/acosf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-acosh-inputs => benchtests/libmvec/acosh-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-acoshf-inputs => benchtests/libmvec/acoshf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-asin-inputs => benchtests/libmvec/asin-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-asinf-inputs => benchtests/libmvec/asinf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-asinh-inputs => benchtests/libmvec/asinh-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-asinhf-inputs => benchtests/libmvec/asinhf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-atan-inputs => benchtests/libmvec/atan-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-atan2-inputs => benchtests/libmvec/atan2-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-atan2f-inputs => benchtests/libmvec/atan2f-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-atanf-inputs => benchtests/libmvec/atanf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-atanh-inputs => benchtests/libmvec/atanh-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-atanhf-inputs => benchtests/libmvec/atanhf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-cbrt-inputs => benchtests/libmvec/cbrt-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-cbrtf-inputs => benchtests/libmvec/cbrtf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-cos-inputs => benchtests/libmvec/cos-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-cosf-inputs => benchtests/libmvec/cosf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-cosh-inputs => benchtests/libmvec/cosh-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-coshf-inputs => benchtests/libmvec/coshf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-erf-inputs => benchtests/libmvec/erf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-erfc-inputs => benchtests/libmvec/erfc-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-erfcf-inputs => benchtests/libmvec/erfcf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-erff-inputs => benchtests/libmvec/erff-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-exp-inputs => benchtests/libmvec/exp-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-exp10-inputs => benchtests/libmvec/exp10-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-exp10f-inputs => benchtests/libmvec/exp10f-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-exp2-inputs => benchtests/libmvec/exp2-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-exp2f-inputs => benchtests/libmvec/exp2f-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-expf-inputs => benchtests/libmvec/expf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-expm1-inputs => benchtests/libmvec/expm1-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-expm1f-inputs => benchtests/libmvec/expm1f-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-hypot-inputs => benchtests/libmvec/hypot-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-hypotf-inputs => benchtests/libmvec/hypotf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log-inputs => benchtests/libmvec/log-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log10-inputs => benchtests/libmvec/log10-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log10f-inputs => benchtests/libmvec/log10f-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log1p-inputs => benchtests/libmvec/log1p-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log1pf-inputs => benchtests/libmvec/log1pf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log2-inputs => benchtests/libmvec/log2-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-log2f-inputs => benchtests/libmvec/log2f-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-logf-inputs => benchtests/libmvec/logf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-pow-inputs => benchtests/libmvec/pow-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-powf-inputs => benchtests/libmvec/powf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-sin-inputs => benchtests/libmvec/sin-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-sinf-inputs => benchtests/libmvec/sinf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-sinh-inputs => benchtests/libmvec/sinh-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-sinhf-inputs => benchtests/libmvec/sinhf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-tan-inputs => benchtests/libmvec/tan-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-tanf-inputs => benchtests/libmvec/tanf-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-tanh-inputs => benchtests/libmvec/tanh-inputs (100%) rename sysdeps/x86_64/fpu/libmvec-tanhf-inputs => benchtests/libmvec/tanhf-inputs (100%) diff --git a/sysdeps/x86_64/fpu/libmvec-acos-inputs b/benchtests/libmvec/acos-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-acos-inputs rename to benchtests/libmvec/acos-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-acosf-inputs b/benchtests/libmvec/acosf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-acosf-inputs rename to benchtests/libmvec/acosf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-acosh-inputs b/benchtests/libmvec/acosh-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-acosh-inputs rename to benchtests/libmvec/acosh-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-acoshf-inputs b/benchtests/libmvec/acoshf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-acoshf-inputs rename to benchtests/libmvec/acoshf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-asin-inputs b/benchtests/libmvec/asin-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-asin-inputs rename to benchtests/libmvec/asin-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-asinf-inputs b/benchtests/libmvec/asinf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-asinf-inputs rename to benchtests/libmvec/asinf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-asinh-inputs b/benchtests/libmvec/asinh-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-asinh-inputs rename to benchtests/libmvec/asinh-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-asinhf-inputs b/benchtests/libmvec/asinhf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-asinhf-inputs rename to benchtests/libmvec/asinhf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-atan-inputs b/benchtests/libmvec/atan-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-atan-inputs rename to benchtests/libmvec/atan-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-atan2-inputs b/benchtests/libmvec/atan2-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-atan2-inputs rename to benchtests/libmvec/atan2-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-atan2f-inputs b/benchtests/libmvec/atan2f-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-atan2f-inputs rename to benchtests/libmvec/atan2f-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-atanf-inputs b/benchtests/libmvec/atanf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-atanf-inputs rename to benchtests/libmvec/atanf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-atanh-inputs b/benchtests/libmvec/atanh-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-atanh-inputs rename to benchtests/libmvec/atanh-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-atanhf-inputs b/benchtests/libmvec/atanhf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-atanhf-inputs rename to benchtests/libmvec/atanhf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-cbrt-inputs b/benchtests/libmvec/cbrt-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-cbrt-inputs rename to benchtests/libmvec/cbrt-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-cbrtf-inputs b/benchtests/libmvec/cbrtf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-cbrtf-inputs rename to benchtests/libmvec/cbrtf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-cos-inputs b/benchtests/libmvec/cos-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-cos-inputs rename to benchtests/libmvec/cos-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-cosf-inputs b/benchtests/libmvec/cosf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-cosf-inputs rename to benchtests/libmvec/cosf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-cosh-inputs b/benchtests/libmvec/cosh-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-cosh-inputs rename to benchtests/libmvec/cosh-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-coshf-inputs b/benchtests/libmvec/coshf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-coshf-inputs rename to benchtests/libmvec/coshf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-erf-inputs b/benchtests/libmvec/erf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-erf-inputs rename to benchtests/libmvec/erf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-erfc-inputs b/benchtests/libmvec/erfc-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-erfc-inputs rename to benchtests/libmvec/erfc-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-erfcf-inputs b/benchtests/libmvec/erfcf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-erfcf-inputs rename to benchtests/libmvec/erfcf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-erff-inputs b/benchtests/libmvec/erff-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-erff-inputs rename to benchtests/libmvec/erff-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-exp-inputs b/benchtests/libmvec/exp-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-exp-inputs rename to benchtests/libmvec/exp-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-exp10-inputs b/benchtests/libmvec/exp10-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-exp10-inputs rename to benchtests/libmvec/exp10-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-exp10f-inputs b/benchtests/libmvec/exp10f-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-exp10f-inputs rename to benchtests/libmvec/exp10f-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-exp2-inputs b/benchtests/libmvec/exp2-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-exp2-inputs rename to benchtests/libmvec/exp2-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-exp2f-inputs b/benchtests/libmvec/exp2f-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-exp2f-inputs rename to benchtests/libmvec/exp2f-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-expf-inputs b/benchtests/libmvec/expf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-expf-inputs rename to benchtests/libmvec/expf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-expm1-inputs b/benchtests/libmvec/expm1-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-expm1-inputs rename to benchtests/libmvec/expm1-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-expm1f-inputs b/benchtests/libmvec/expm1f-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-expm1f-inputs rename to benchtests/libmvec/expm1f-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-hypot-inputs b/benchtests/libmvec/hypot-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-hypot-inputs rename to benchtests/libmvec/hypot-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-hypotf-inputs b/benchtests/libmvec/hypotf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-hypotf-inputs rename to benchtests/libmvec/hypotf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log-inputs b/benchtests/libmvec/log-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log-inputs rename to benchtests/libmvec/log-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log10-inputs b/benchtests/libmvec/log10-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log10-inputs rename to benchtests/libmvec/log10-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log10f-inputs b/benchtests/libmvec/log10f-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log10f-inputs rename to benchtests/libmvec/log10f-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log1p-inputs b/benchtests/libmvec/log1p-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log1p-inputs rename to benchtests/libmvec/log1p-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log1pf-inputs b/benchtests/libmvec/log1pf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log1pf-inputs rename to benchtests/libmvec/log1pf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log2-inputs b/benchtests/libmvec/log2-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log2-inputs rename to benchtests/libmvec/log2-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-log2f-inputs b/benchtests/libmvec/log2f-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-log2f-inputs rename to benchtests/libmvec/log2f-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-logf-inputs b/benchtests/libmvec/logf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-logf-inputs rename to benchtests/libmvec/logf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-pow-inputs b/benchtests/libmvec/pow-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-pow-inputs rename to benchtests/libmvec/pow-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-powf-inputs b/benchtests/libmvec/powf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-powf-inputs rename to benchtests/libmvec/powf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-sin-inputs b/benchtests/libmvec/sin-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-sin-inputs rename to benchtests/libmvec/sin-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-sinf-inputs b/benchtests/libmvec/sinf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-sinf-inputs rename to benchtests/libmvec/sinf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-sinh-inputs b/benchtests/libmvec/sinh-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-sinh-inputs rename to benchtests/libmvec/sinh-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-sinhf-inputs b/benchtests/libmvec/sinhf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-sinhf-inputs rename to benchtests/libmvec/sinhf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-tan-inputs b/benchtests/libmvec/tan-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-tan-inputs rename to benchtests/libmvec/tan-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-tanf-inputs b/benchtests/libmvec/tanf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-tanf-inputs rename to benchtests/libmvec/tanf-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-tanh-inputs b/benchtests/libmvec/tanh-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-tanh-inputs rename to benchtests/libmvec/tanh-inputs diff --git a/sysdeps/x86_64/fpu/libmvec-tanhf-inputs b/benchtests/libmvec/tanhf-inputs similarity index 100% rename from sysdeps/x86_64/fpu/libmvec-tanhf-inputs rename to benchtests/libmvec/tanhf-inputs diff --git a/sysdeps/x86_64/fpu/scripts/bench_libmvec.py b/sysdeps/x86_64/fpu/scripts/bench_libmvec.py index 426169f8a3..a66f0324b3 100755 --- a/sysdeps/x86_64/fpu/scripts/bench_libmvec.py +++ b/sysdeps/x86_64/fpu/scripts/bench_libmvec.py @@ -396,7 +396,7 @@ def parse_file(func_types): func = func_types[-1] try: - with open('../sysdeps/x86_64/fpu/libmvec-%s-inputs' % func) as f: + with open('../benchtests/libmvec/%s-inputs' % func) as f: for line in f: # Look for directives and parse it if found. if line.startswith('##'):