From patchwork Mon Mar 7 15:01:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 1602403 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=XY9rgqAL; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KC3s00P3Fz9sFt for ; Tue, 8 Mar 2022 03:32:20 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0467A3857C48 for ; Mon, 7 Mar 2022 16:32:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0467A3857C48 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646670738; bh=emXCEogsvCPUhPvfwxuKSWFpw89AxW8pWM10PSYE4CA=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=XY9rgqALrXK93P0gdfCMdpyziYCshDxqOfGu+ueu69JmJ6aTFN17LjO2acU56uz9s m6Edis38R8SZPo7PR3D5CvhDfG8mYCrNw3Pzur59AYIyctJBqhM6x+Kp6bqw9uGPi7 o4vhx4FQtWDJIsmQk9MlUtkQPz/iMIYts4GbGrwc= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by sourceware.org (Postfix) with ESMTPS id CA49F3858424 for ; Mon, 7 Mar 2022 15:03:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CA49F3858424 X-IronPort-AV: E=McAfee;i="6200,9189,10278"; a="235017280" X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="235017280" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 07:02:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="631871414" Received: from scymds01.sc.intel.com ([10.148.94.138]) by FMSMGA003.fm.intel.com with ESMTP; 07 Mar 2022 07:02:09 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 227F21fB016772; Mon, 7 Mar 2022 07:02:09 -0800 To: libc-alpha@sourceware.org Subject: [PATCH 097/126] x86_64: Fix svml_s_log1pf16_core_avx512.S code formatting Date: Mon, 7 Mar 2022 07:01:32 -0800 Message-Id: <20220307150201.10590-98-skpgkp2@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com> References: <20220307150201.10590-1-skpgkp2@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LOTSOFHASH, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. --- .../multiarch/svml_s_log1pf16_core_avx512.S | 425 +++++++++--------- 1 file changed, 212 insertions(+), 213 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S index cc39548cc6..8fa5068595 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S @@ -19,7 +19,7 @@ /* * ALGORITHM DESCRIPTION: * - * 1+x = 2^k*(xh + xl) is computed in high-low parts; xh in [1,2) + * 1+x = 2^k*(xh + xl) is computed in high-low parts; xh in [1, 2) * Get short reciprocal approximation Rcp ~ 1/xh * R = (Rcp*xh - 1.0) + Rcp*xl * log1p(x) = k*log(2.0) - log(Rcp) + poly(R) @@ -30,242 +30,241 @@ /* Offsets for data table __svml_slog1p_data_internal */ -#define SgnMask 0 -#define sOne 64 -#define sPoly_1 128 -#define sPoly_2 192 -#define sPoly_3 256 -#define sPoly_4 320 -#define sPoly_5 384 -#define sPoly_6 448 -#define sPoly_7 512 -#define sPoly_8 576 -#define iHiDelta 640 -#define iLoRange 704 -#define iBrkValue 768 -#define iOffExpoMask 832 -#define sLn2 896 +#define SgnMask 0 +#define sOne 64 +#define sPoly_1 128 +#define sPoly_2 192 +#define sPoly_3 256 +#define sPoly_4 320 +#define sPoly_5 384 +#define sPoly_6 448 +#define sPoly_7 512 +#define sPoly_8 576 +#define iHiDelta 640 +#define iLoRange 704 +#define iBrkValue 768 +#define iOffExpoMask 832 +#define sLn2 896 #include - .text - .section .text.exex512,"ax",@progbits + .section .text.exex512, "ax", @progbits ENTRY(_ZGVeN16v_log1pf_skx) - pushq %rbp - cfi_def_cfa_offset(16) - movq %rsp, %rbp - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - andq $-64, %rsp - subq $192, %rsp - vmovups sOne+__svml_slog1p_data_internal(%rip), %zmm2 - -/* reduction: compute r,n */ - vmovups iBrkValue+__svml_slog1p_data_internal(%rip), %zmm12 - vmovups SgnMask+__svml_slog1p_data_internal(%rip), %zmm4 - vmovaps %zmm0, %zmm3 - -/* compute 1+x as high, low parts */ - vmaxps {sae}, %zmm3, %zmm2, %zmm5 - vminps {sae}, %zmm3, %zmm2, %zmm7 - vandnps %zmm3, %zmm4, %zmm1 - vpternlogd $255, %zmm4, %zmm4, %zmm4 - vaddps {rn-sae}, %zmm7, %zmm5, %zmm9 - vpsubd %zmm12, %zmm9, %zmm10 - vsubps {rn-sae}, %zmm9, %zmm5, %zmm6 - -/* check argument value ranges */ - vpaddd iHiDelta+__svml_slog1p_data_internal(%rip), %zmm9, %zmm8 - vpsrad $23, %zmm10, %zmm13 - vmovups sPoly_5+__svml_slog1p_data_internal(%rip), %zmm9 - vpcmpd $5, iLoRange+__svml_slog1p_data_internal(%rip), %zmm8, %k1 - vpslld $23, %zmm13, %zmm14 - vaddps {rn-sae}, %zmm7, %zmm6, %zmm15 - vcvtdq2ps {rn-sae}, %zmm13, %zmm0 - vpsubd %zmm14, %zmm2, %zmm13 - vmovups sPoly_8+__svml_slog1p_data_internal(%rip), %zmm7 - vmovups sPoly_1+__svml_slog1p_data_internal(%rip), %zmm14 - vmulps {rn-sae}, %zmm13, %zmm15, %zmm6 - vpandd iOffExpoMask+__svml_slog1p_data_internal(%rip), %zmm10, %zmm11 - vpaddd %zmm12, %zmm11, %zmm5 - vmovups sPoly_4+__svml_slog1p_data_internal(%rip), %zmm10 - vmovups sPoly_3+__svml_slog1p_data_internal(%rip), %zmm11 - vmovups sPoly_2+__svml_slog1p_data_internal(%rip), %zmm12 - -/* polynomial evaluation */ - vsubps {rn-sae}, %zmm2, %zmm5, %zmm2 - vaddps {rn-sae}, %zmm6, %zmm2, %zmm15 - vmovups sPoly_7+__svml_slog1p_data_internal(%rip), %zmm2 - vfmadd231ps {rn-sae}, %zmm15, %zmm7, %zmm2 - vpandnd %zmm8, %zmm8, %zmm4{%k1} - vmovups sPoly_6+__svml_slog1p_data_internal(%rip), %zmm8 - -/* combine and get argument value range mask */ - vptestmd %zmm4, %zmm4, %k0 - vfmadd213ps {rn-sae}, %zmm8, %zmm15, %zmm2 - kmovw %k0, %edx - vfmadd213ps {rn-sae}, %zmm9, %zmm15, %zmm2 - vfmadd213ps {rn-sae}, %zmm10, %zmm15, %zmm2 - vfmadd213ps {rn-sae}, %zmm11, %zmm15, %zmm2 - vfmadd213ps {rn-sae}, %zmm12, %zmm15, %zmm2 - vfmadd213ps {rn-sae}, %zmm14, %zmm15, %zmm2 - vmulps {rn-sae}, %zmm15, %zmm2, %zmm4 - vfmadd213ps {rn-sae}, %zmm15, %zmm15, %zmm4 - -/* final reconstruction */ - vmovups sLn2+__svml_slog1p_data_internal(%rip), %zmm15 - vfmadd213ps {rn-sae}, %zmm4, %zmm15, %zmm0 - vorps %zmm1, %zmm0, %zmm0 - testl %edx, %edx - -/* Go to special inputs processing branch */ - jne L(SPECIAL_VALUES_BRANCH) - # LOE rbx r12 r13 r14 r15 edx zmm0 zmm3 - -/* Restore registers - * and exit the function - */ + pushq %rbp + cfi_def_cfa_offset(16) + movq %rsp, %rbp + cfi_def_cfa(6, 16) + cfi_offset(6, -16) + andq $-64, %rsp + subq $192, %rsp + vmovups sOne+__svml_slog1p_data_internal(%rip), %zmm2 + + /* reduction: compute r, n */ + vmovups iBrkValue+__svml_slog1p_data_internal(%rip), %zmm12 + vmovups SgnMask+__svml_slog1p_data_internal(%rip), %zmm4 + vmovaps %zmm0, %zmm3 + + /* compute 1+x as high, low parts */ + vmaxps {sae}, %zmm3, %zmm2, %zmm5 + vminps {sae}, %zmm3, %zmm2, %zmm7 + vandnps %zmm3, %zmm4, %zmm1 + vpternlogd $255, %zmm4, %zmm4, %zmm4 + vaddps {rn-sae}, %zmm7, %zmm5, %zmm9 + vpsubd %zmm12, %zmm9, %zmm10 + vsubps {rn-sae}, %zmm9, %zmm5, %zmm6 + + /* check argument value ranges */ + vpaddd iHiDelta+__svml_slog1p_data_internal(%rip), %zmm9, %zmm8 + vpsrad $23, %zmm10, %zmm13 + vmovups sPoly_5+__svml_slog1p_data_internal(%rip), %zmm9 + vpcmpd $5, iLoRange+__svml_slog1p_data_internal(%rip), %zmm8, %k1 + vpslld $23, %zmm13, %zmm14 + vaddps {rn-sae}, %zmm7, %zmm6, %zmm15 + vcvtdq2ps {rn-sae}, %zmm13, %zmm0 + vpsubd %zmm14, %zmm2, %zmm13 + vmovups sPoly_8+__svml_slog1p_data_internal(%rip), %zmm7 + vmovups sPoly_1+__svml_slog1p_data_internal(%rip), %zmm14 + vmulps {rn-sae}, %zmm13, %zmm15, %zmm6 + vpandd iOffExpoMask+__svml_slog1p_data_internal(%rip), %zmm10, %zmm11 + vpaddd %zmm12, %zmm11, %zmm5 + vmovups sPoly_4+__svml_slog1p_data_internal(%rip), %zmm10 + vmovups sPoly_3+__svml_slog1p_data_internal(%rip), %zmm11 + vmovups sPoly_2+__svml_slog1p_data_internal(%rip), %zmm12 + + /* polynomial evaluation */ + vsubps {rn-sae}, %zmm2, %zmm5, %zmm2 + vaddps {rn-sae}, %zmm6, %zmm2, %zmm15 + vmovups sPoly_7+__svml_slog1p_data_internal(%rip), %zmm2 + vfmadd231ps {rn-sae}, %zmm15, %zmm7, %zmm2 + vpandnd %zmm8, %zmm8, %zmm4{%k1} + vmovups sPoly_6+__svml_slog1p_data_internal(%rip), %zmm8 + + /* combine and get argument value range mask */ + vptestmd %zmm4, %zmm4, %k0 + vfmadd213ps {rn-sae}, %zmm8, %zmm15, %zmm2 + kmovw %k0, %edx + vfmadd213ps {rn-sae}, %zmm9, %zmm15, %zmm2 + vfmadd213ps {rn-sae}, %zmm10, %zmm15, %zmm2 + vfmadd213ps {rn-sae}, %zmm11, %zmm15, %zmm2 + vfmadd213ps {rn-sae}, %zmm12, %zmm15, %zmm2 + vfmadd213ps {rn-sae}, %zmm14, %zmm15, %zmm2 + vmulps {rn-sae}, %zmm15, %zmm2, %zmm4 + vfmadd213ps {rn-sae}, %zmm15, %zmm15, %zmm4 + + /* final reconstruction */ + vmovups sLn2+__svml_slog1p_data_internal(%rip), %zmm15 + vfmadd213ps {rn-sae}, %zmm4, %zmm15, %zmm0 + vorps %zmm1, %zmm0, %zmm0 + testl %edx, %edx + + /* Go to special inputs processing branch */ + jne L(SPECIAL_VALUES_BRANCH) + # LOE rbx r12 r13 r14 r15 edx zmm0 zmm3 + + /* Restore registers + * and exit the function + */ L(EXIT): - movq %rbp, %rsp - popq %rbp - cfi_def_cfa(7, 8) - cfi_restore(6) - ret - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - -/* Branch to process - * special inputs - */ + movq %rbp, %rsp + popq %rbp + cfi_def_cfa(7, 8) + cfi_restore(6) + ret + cfi_def_cfa(6, 16) + cfi_offset(6, -16) + + /* Branch to process + * special inputs + */ L(SPECIAL_VALUES_BRANCH): - vmovups %zmm3, 64(%rsp) - vmovups %zmm0, 128(%rsp) - # LOE rbx r12 r13 r14 r15 edx zmm0 - - xorl %eax, %eax - # LOE rbx r12 r13 r14 r15 eax edx - - vzeroupper - movq %r12, 16(%rsp) - /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ - .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 - movl %eax, %r12d - movq %r13, 8(%rsp) - /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ - .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 - movl %edx, %r13d - movq %r14, (%rsp) - /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ - .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 - # LOE rbx r15 r12d r13d - -/* Range mask - * bits check - */ + vmovups %zmm3, 64(%rsp) + vmovups %zmm0, 128(%rsp) + # LOE rbx r12 r13 r14 r15 edx zmm0 + + xorl %eax, %eax + # LOE rbx r12 r13 r14 r15 eax edx + + vzeroupper + movq %r12, 16(%rsp) + /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ + .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 + movl %eax, %r12d + movq %r13, 8(%rsp) + /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ + .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 + movl %edx, %r13d + movq %r14, (%rsp) + /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ + .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 + # LOE rbx r15 r12d r13d + + /* Range mask + * bits check + */ L(RANGEMASK_CHECK): - btl %r12d, %r13d + btl %r12d, %r13d -/* Call scalar math function */ - jc L(SCALAR_MATH_CALL) - # LOE rbx r15 r12d r13d + /* Call scalar math function */ + jc L(SCALAR_MATH_CALL) + # LOE rbx r15 r12d r13d -/* Special inputs - * processing loop - */ + /* Special inputs + * processing loop + */ L(SPECIAL_VALUES_LOOP): - incl %r12d - cmpl $16, %r12d - -/* Check bits in range mask */ - jl L(RANGEMASK_CHECK) - # LOE rbx r15 r12d r13d - - movq 16(%rsp), %r12 - cfi_restore(12) - movq 8(%rsp), %r13 - cfi_restore(13) - movq (%rsp), %r14 - cfi_restore(14) - vmovups 128(%rsp), %zmm0 - -/* Go to exit */ - jmp L(EXIT) - /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ - .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 - /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ - .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 - /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ - .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 - # LOE rbx r12 r13 r14 r15 zmm0 - -/* Scalar math fucntion call - * to process special input - */ + incl %r12d + cmpl $16, %r12d + + /* Check bits in range mask */ + jl L(RANGEMASK_CHECK) + # LOE rbx r15 r12d r13d + + movq 16(%rsp), %r12 + cfi_restore(12) + movq 8(%rsp), %r13 + cfi_restore(13) + movq (%rsp), %r14 + cfi_restore(14) + vmovups 128(%rsp), %zmm0 + + /* Go to exit */ + jmp L(EXIT) + /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ + .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 + /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ + .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 + /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ + .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 + # LOE rbx r12 r13 r14 r15 zmm0 + + /* Scalar math fucntion call + * to process special input + */ L(SCALAR_MATH_CALL): - movl %r12d, %r14d - movss 64(%rsp,%r14,4), %xmm0 - call log1pf@PLT - # LOE rbx r14 r15 r12d r13d xmm0 + movl %r12d, %r14d + movss 64(%rsp, %r14, 4), %xmm0 + call log1pf@PLT + # LOE rbx r14 r15 r12d r13d xmm0 - movss %xmm0, 128(%rsp,%r14,4) + movss %xmm0, 128(%rsp, %r14, 4) -/* Process special inputs in loop */ - jmp L(SPECIAL_VALUES_LOOP) - # LOE rbx r15 r12d r13d + /* Process special inputs in loop */ + jmp L(SPECIAL_VALUES_LOOP) + # LOE rbx r15 r12d r13d END(_ZGVeN16v_log1pf_skx) - .section .rodata, "a" - .align 64 + .section .rodata, "a" + .align 64 #ifdef __svml_slog1p_data_internal_typedef typedef unsigned int VUINT32; typedef struct { - __declspec(align(64)) VUINT32 SgnMask[16][1]; - __declspec(align(64)) VUINT32 sOne[16][1]; - __declspec(align(64)) VUINT32 sPoly[8][16][1]; - __declspec(align(64)) VUINT32 iHiDelta[16][1]; - __declspec(align(64)) VUINT32 iLoRange[16][1]; - __declspec(align(64)) VUINT32 iBrkValue[16][1]; - __declspec(align(64)) VUINT32 iOffExpoMask[16][1]; - __declspec(align(64)) VUINT32 sLn2[16][1]; + __declspec(align(64)) VUINT32 SgnMask[16][1]; + __declspec(align(64)) VUINT32 sOne[16][1]; + __declspec(align(64)) VUINT32 sPoly[8][16][1]; + __declspec(align(64)) VUINT32 iHiDelta[16][1]; + __declspec(align(64)) VUINT32 iLoRange[16][1]; + __declspec(align(64)) VUINT32 iBrkValue[16][1]; + __declspec(align(64)) VUINT32 iOffExpoMask[16][1]; + __declspec(align(64)) VUINT32 sLn2[16][1]; } __svml_slog1p_data_internal; #endif __svml_slog1p_data_internal: - /*== SgnMask ==*/ - .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff - /*== sOne = SP 1.0 ==*/ - .align 64 - .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 - /*== sPoly[] = SP polynomial ==*/ - .align 64 - .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */ - .long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */ - .long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */ - .long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */ - .long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */ - .long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */ - .long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */ - .long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */ - /*== iHiDelta = SP 80000000-7f000000 ==*/ - .align 64 - .long 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 - /*== iLoRange = SP 00800000+iHiDelta ==*/ - .align 64 - .long 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000 - /*== iBrkValue = SP 2/3 ==*/ - .align 64 - .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab - /*== iOffExpoMask = SP significand mask ==*/ - .align 64 - .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff - /*== sLn2 = SP ln(2) ==*/ - .align 64 - .long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218 - .align 64 - .type __svml_slog1p_data_internal,@object - .size __svml_slog1p_data_internal,.-__svml_slog1p_data_internal + /* SgnMask */ + .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff + /* sOne = SP 1.0 */ + .align 64 + .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 + /* sPoly[] = SP polynomial */ + .align 64 + .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */ + .long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */ + .long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */ + .long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */ + .long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */ + .long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */ + .long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */ + .long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */ + /* iHiDelta = SP 80000000-7f000000 */ + .align 64 + .long 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 + /* iLoRange = SP 00800000+iHiDelta */ + .align 64 + .long 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000 + /* iBrkValue = SP 2/3 */ + .align 64 + .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab + /* iOffExpoMask = SP significand mask */ + .align 64 + .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff + /* sLn2 = SP ln(2) */ + .align 64 + .long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218 + .align 64 + .type __svml_slog1p_data_internal, @object + .size __svml_slog1p_data_internal, .-__svml_slog1p_data_internal