From patchwork Mon Mar 7 15:00:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 1602374 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=UK26dDIg; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KC3S46t2Xz9sFt for ; Tue, 8 Mar 2022 03:14:12 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B00F73858424 for ; Mon, 7 Mar 2022 16:14:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B00F73858424 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646669650; bh=eMwBS6YXeDXOacMJwKxQn+DWJ9XtXeyxs4GmIxLRa98=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=UK26dDIge65VacTD9s6GI7tj0ivGqeKPcEm2CoDzzO1bsuGITFG1rLxRPxBuVcROD BNfJvR5R10MQLkftK9OuU458s/+HAhl+7WZVTB3ewn28Ebo2A5DyqbUABj5P9j+mis Zwn7NLDp1h5ieHbBJwEjZohilyHxiznrAc+qttuk= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by sourceware.org (Postfix) with ESMTPS id E348A385843D for ; Mon, 7 Mar 2022 15:03:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E348A385843D X-IronPort-AV: E=McAfee;i="6200,9189,10278"; a="235017249" X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="235017249" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 07:02:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="553186273" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga008.jf.intel.com with ESMTP; 07 Mar 2022 07:02:03 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 227F21dd016772; Mon, 7 Mar 2022 07:02:02 -0800 To: libc-alpha@sourceware.org Subject: [PATCH 005/126] x86_64: Fix svml_d_acos4_core_avx2.S code formatting Date: Mon, 7 Mar 2022 07:00:00 -0800 Message-Id: <20220307150201.10590-6-skpgkp2@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com> References: <20220307150201.10590-1-skpgkp2@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. --- .../fpu/multiarch/svml_d_acos4_core_avx2.S | 455 +++++++++--------- 1 file changed, 227 insertions(+), 228 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_acos4_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_acos4_core_avx2.S index 9efd359bfa..e19bddd2e2 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_d_acos4_core_avx2.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_acos4_core_avx2.S @@ -28,258 +28,257 @@ /* Offsets for data table __svml_dacos_data_internal */ -#define SgnBit 0 -#define OneHalf 32 -#define SmallNorm 64 -#define MOne 96 -#define Two 128 -#define sqrt_coeff 160 -#define poly_coeff 288 -#define PiH 672 -#define Pi2H 704 +#define SgnBit 0 +#define OneHalf 32 +#define SmallNorm 64 +#define MOne 96 +#define Two 128 +#define sqrt_coeff 160 +#define poly_coeff 288 +#define PiH 672 +#define Pi2H 704 #include - .text - .section .text.avx2,"ax",@progbits + .section .text.avx2, "ax", @progbits ENTRY(_ZGVdN4v_acos_avx2) - pushq %rbp - cfi_def_cfa_offset(16) - movq %rsp, %rbp - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - andq $-32, %rsp - subq $96, %rsp - vmovupd __svml_dacos_data_internal(%rip), %ymm6 - vmovupd OneHalf+__svml_dacos_data_internal(%rip), %ymm7 - vmovapd %ymm0, %ymm5 - -/* x = -|arg| */ - vorpd %ymm5, %ymm6, %ymm4 - -/* Y = 0.5 + 0.5*(-x) */ - vfmadd231pd %ymm4, %ymm7, %ymm7 - -/* x^2 */ - vmulpd %ymm4, %ymm4, %ymm8 - -/* S ~ 2*sqrt(Y) */ - vmovupd sqrt_coeff+__svml_dacos_data_internal(%rip), %ymm0 - vcmplt_oqpd SmallNorm+__svml_dacos_data_internal(%rip), %ymm7, %ymm12 - vminpd %ymm7, %ymm8, %ymm2 - -/* NaN processed in special branch (so wind test passed) */ - vcmpnge_uqpd MOne+__svml_dacos_data_internal(%rip), %ymm4, %ymm9 - vcvtpd2ps %ymm7, %xmm10 - vmovupd poly_coeff+64+__svml_dacos_data_internal(%rip), %ymm8 - vcmpnlt_uqpd %ymm7, %ymm2, %ymm1 - vrsqrtps %xmm10, %xmm11 - vfmadd213pd poly_coeff+96+__svml_dacos_data_internal(%rip), %ymm2, %ymm8 - vcvtps2pd %xmm11, %ymm13 - vmovupd poly_coeff+128+__svml_dacos_data_internal(%rip), %ymm11 - vandnpd %ymm13, %ymm12, %ymm14 - vmulpd %ymm14, %ymm14, %ymm15 - vfmadd213pd poly_coeff+160+__svml_dacos_data_internal(%rip), %ymm2, %ymm11 - vmulpd %ymm2, %ymm2, %ymm13 - vmovupd poly_coeff+256+__svml_dacos_data_internal(%rip), %ymm12 - vmulpd %ymm13, %ymm13, %ymm10 - vfmadd213pd poly_coeff+288+__svml_dacos_data_internal(%rip), %ymm2, %ymm12 - vandpd %ymm5, %ymm6, %ymm3 - vaddpd %ymm7, %ymm7, %ymm6 - vmulpd %ymm6, %ymm14, %ymm7 - vfmsub213pd Two+__svml_dacos_data_internal(%rip), %ymm15, %ymm6 - vmovupd poly_coeff+320+__svml_dacos_data_internal(%rip), %ymm14 - vfmadd213pd sqrt_coeff+32+__svml_dacos_data_internal(%rip), %ymm6, %ymm0 - vmulpd %ymm6, %ymm7, %ymm15 - vfmadd213pd poly_coeff+352+__svml_dacos_data_internal(%rip), %ymm2, %ymm14 - vfmadd213pd sqrt_coeff+64+__svml_dacos_data_internal(%rip), %ymm6, %ymm0 - vfmadd213pd sqrt_coeff+96+__svml_dacos_data_internal(%rip), %ymm6, %ymm0 - -/* polynomial */ - vmovupd poly_coeff+__svml_dacos_data_internal(%rip), %ymm6 - vfnmadd213pd %ymm7, %ymm15, %ymm0 - vfmadd213pd poly_coeff+32+__svml_dacos_data_internal(%rip), %ymm2, %ymm6 - vblendvpd %ymm1, %ymm0, %ymm4, %ymm0 - vfmadd213pd %ymm8, %ymm13, %ymm6 - vmovmskpd %ymm9, %edx - vmovupd poly_coeff+192+__svml_dacos_data_internal(%rip), %ymm9 - vfmadd213pd poly_coeff+224+__svml_dacos_data_internal(%rip), %ymm2, %ymm9 - vfmadd213pd %ymm9, %ymm13, %ymm11 - vfmadd213pd %ymm11, %ymm10, %ymm6 - vfmadd213pd %ymm12, %ymm13, %ymm6 - vfmadd213pd %ymm14, %ymm13, %ymm6 - vmulpd %ymm6, %ymm2, %ymm9 - -/* X