From patchwork Mon Mar 7 15:00:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 1602350 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=yqANsEq1; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KC34p0rs9z9sBy for ; Tue, 8 Mar 2022 02:57:30 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1F6C2385841B for ; Mon, 7 Mar 2022 15:57:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1F6C2385841B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646668648; bh=vnm5GMQ+pIbguGoS6QwICjhOriVQ4mkA7s2I+R8qHBs=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=yqANsEq1b1B654tKfXQtl6WOf7jBMollC47JzbXaTdkiBz80qR7brFfNmSCyYV1PN QsbXYtNdIzxa8pdu9T4CLsGv4nZA4Qhhh8+DnUO/pWe608NptSUeCmQUqvc/tNHbqr wCXTSAblcukkAMLO6tJFA7blVJFdJvQqjqv0bXWs= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id 006C73858404 for ; Mon, 7 Mar 2022 15:02:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 006C73858404 X-IronPort-AV: E=McAfee;i="6200,9189,10278"; a="251983677" X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="251983677" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 07:02:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="610639875" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga004.fm.intel.com with ESMTP; 07 Mar 2022 07:02:06 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 227F21eP016772; Mon, 7 Mar 2022 07:02:06 -0800 To: libc-alpha@sourceware.org Subject: [PATCH 051/126] x86_64: Fix svml_s_coshf8_core_avx2.S code formatting Date: Mon, 7 Mar 2022 07:00:46 -0800 Message-Id: <20220307150201.10590-52-skpgkp2@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com> References: <20220307150201.10590-1-skpgkp2@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, RCVD_IN_MSPIKE_H2, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. --- .../fpu/multiarch/svml_s_coshf8_core_avx2.S | 490 +++++++++--------- 1 file changed, 244 insertions(+), 246 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_coshf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_coshf8_core_avx2.S index a7726b8d42..6f29218af1 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_coshf8_core_avx2.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_coshf8_core_avx2.S @@ -34,275 +34,273 @@ /* Offsets for data table __svml_scosh_data_internal */ -#define _sInvLn2 0 -#define _sLn2hi 32 -#define _sLn2lo 64 -#define _sSign 96 -#define _sShifter 128 -#define _iDomainRange 160 -#define _sPC1 192 -#define _sPC2 224 -#define _sPC3 256 -#define _sPC4 288 -#define _sPC5 320 -#define _sPC6 352 -#define _iHalf 384 +#define _sInvLn2 0 +#define _sLn2hi 32 +#define _sLn2lo 64 +#define _sSign 96 +#define _sShifter 128 +#define _iDomainRange 160 +#define _sPC1 192 +#define _sPC2 224 +#define _sPC3 256 +#define _sPC4 288 +#define _sPC5 320 +#define _sPC6 352 +#define _iHalf 384 #include - .text - .section .text.avx2,"ax",@progbits + .section .text.avx2, "ax", @progbits ENTRY(_ZGVdN8v_coshf_avx2) - pushq %rbp - cfi_def_cfa_offset(16) - movq %rsp, %rbp - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - andq $-32, %rsp - subq $96, %rsp - vmovups _sSign+__svml_scosh_data_internal(%rip), %ymm2 - vmovups _sShifter+__svml_scosh_data_internal(%rip), %ymm7 - -/* - * Load argument - * dM = x/log(2) + RShifter - */ - vmovups _sInvLn2+__svml_scosh_data_internal(%rip), %ymm10 - vmovups _sLn2hi+__svml_scosh_data_internal(%rip), %ymm8 - vmovups _iDomainRange+__svml_scosh_data_internal(%rip), %ymm3 - -/* - * sinh(r) = r*((a1=1)+r^2*(a3+r^2*(a5+{v1 r^2*a7})))) = r + r*(r^2*(a3+r^2*(a5+r^2*a7))) .... - * sSinh_r = (a3+r^2*a5) - */ - vmovups _sPC5+__svml_scosh_data_internal(%rip), %ymm15 - vmovups _iHalf+__svml_scosh_data_internal(%rip), %ymm11 - vmovaps %ymm0, %ymm1 - -/* - * Implementation - * Abs argument - */ - vandnps %ymm1, %ymm2, %ymm0 - vfmadd213ps %ymm7, %ymm0, %ymm10 - -/* - * R - * sN = sM - RShifter - */ - vsubps %ymm7, %ymm10, %ymm9 - -/* - * G1,G2 2^N,2^(-N) - * iM now is an EXP(2^N) - */ - vpslld $23, %ymm10, %ymm12 - -/* Check for overflow\underflow */ - vpcmpgtd %ymm3, %ymm0, %ymm4 - vpcmpeqd %ymm3, %ymm0, %ymm5 - -/* sR = sX - sN*Log2_hi */ - vfnmadd231ps %ymm8, %ymm9, %ymm0 - vpaddd %ymm12, %ymm11, %ymm13 - vpsubd %ymm12, %ymm11, %ymm14 - vpor %ymm5, %ymm4, %ymm6 - -/* sR = (sX - sN*Log2_hi) - sN*Log2_lo */ - vfnmadd231ps _sLn2lo+__svml_scosh_data_internal(%rip), %ymm9, %ymm0 - -/* sG1 = 2^(N-1)-2^(-N-1) */ - vsubps %ymm14, %ymm13, %ymm4 - -/* sG2 = 2^(N-1)+2^(-N-1) */ - vaddps %ymm14, %ymm13, %ymm3 - -/* sR2 = sR^2,shaffled */ - vmulps %ymm0, %ymm0, %ymm2 - vfmadd213ps _sPC3+__svml_scosh_data_internal(%rip), %ymm2, %ymm15 - -/* sSinh_r = r^2*(a3+r^2*a5) */ - vmulps %ymm15, %ymm2, %ymm13 - -/* sSinh_r = r + r*(r^2*(a3+r^2*a5)) */ - vfmadd213ps %ymm0, %ymm0, %ymm13 - -/* - * sinh(X) = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) - * sOut = (a4 +a6*sR2) - */ - vmovups _sPC6+__svml_scosh_data_internal(%rip), %ymm0 - vfmadd213ps _sPC4+__svml_scosh_data_internal(%rip), %ymm2, %ymm0 - -/* sOut = a2+sR2*(a4+a6*sR2) */ - vfmadd213ps _sPC2+__svml_scosh_data_internal(%rip), %ymm2, %ymm0 - -/* sOut = sR2*(a2+sR2*(a4+a6*sR2) */ - vmulps %ymm0, %ymm2, %ymm15 - -/* sOut = sG2*sR2*(a2+sR2*(a4+a6*sR2) */ - vmulps %ymm15, %ymm3, %ymm14 - -/* sOut = sG1*sinh(dR)+sG2*sR2*(a2+sR2*(a4+a6*sR2) */ - vfmadd213ps %ymm14, %ymm13, %ymm4 - vmovmskps %ymm6, %edx - -/* sOut = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) */ - vaddps %ymm4, %ymm3, %ymm0 - -/* Ret H */ - testl %edx, %edx - -/* Go to special inputs processing branch */ - jne L(SPECIAL_VALUES_BRANCH) - # LOE rbx r12 r13 r14 r15 edx ymm0 ymm1 - -/* Restore registers - * and exit the function - */ + pushq %rbp + cfi_def_cfa_offset(16) + movq %rsp, %rbp + cfi_def_cfa(6, 16) + cfi_offset(6, -16) + andq $-32, %rsp + subq $96, %rsp + vmovups _sSign+__svml_scosh_data_internal(%rip), %ymm2 + vmovups _sShifter+__svml_scosh_data_internal(%rip), %ymm7 + + /* + * Load argument + * dM = x/log(2) + RShifter + */ + vmovups _sInvLn2+__svml_scosh_data_internal(%rip), %ymm10 + vmovups _sLn2hi+__svml_scosh_data_internal(%rip), %ymm8 + vmovups _iDomainRange+__svml_scosh_data_internal(%rip), %ymm3 + + /* + * sinh(r) = r*((a1=1)+r^2*(a3+r^2*(a5+{v1 r^2*a7})))) = r + r*(r^2*(a3+r^2*(a5+r^2*a7))) .... + * sSinh_r = (a3+r^2*a5) + */ + vmovups _sPC5+__svml_scosh_data_internal(%rip), %ymm15 + vmovups _iHalf+__svml_scosh_data_internal(%rip), %ymm11 + vmovaps %ymm0, %ymm1 + + /* + * Implementation + * Abs argument + */ + vandnps %ymm1, %ymm2, %ymm0 + vfmadd213ps %ymm7, %ymm0, %ymm10 + + /* + * R + * sN = sM - RShifter + */ + vsubps %ymm7, %ymm10, %ymm9 + + /* + * G1, G2 2^N, 2^(-N) + * iM now is an EXP(2^N) + */ + vpslld $23, %ymm10, %ymm12 + + /* Check for overflow\underflow */ + vpcmpgtd %ymm3, %ymm0, %ymm4 + vpcmpeqd %ymm3, %ymm0, %ymm5 + + /* sR = sX - sN*Log2_hi */ + vfnmadd231ps %ymm8, %ymm9, %ymm0 + vpaddd %ymm12, %ymm11, %ymm13 + vpsubd %ymm12, %ymm11, %ymm14 + vpor %ymm5, %ymm4, %ymm6 + + /* sR = (sX - sN*Log2_hi) - sN*Log2_lo */ + vfnmadd231ps _sLn2lo+__svml_scosh_data_internal(%rip), %ymm9, %ymm0 + + /* sG1 = 2^(N-1)-2^(-N-1) */ + vsubps %ymm14, %ymm13, %ymm4 + + /* sG2 = 2^(N-1)+2^(-N-1) */ + vaddps %ymm14, %ymm13, %ymm3 + + /* sR2 = sR^2, shaffled */ + vmulps %ymm0, %ymm0, %ymm2 + vfmadd213ps _sPC3+__svml_scosh_data_internal(%rip), %ymm2, %ymm15 + + /* sSinh_r = r^2*(a3+r^2*a5) */ + vmulps %ymm15, %ymm2, %ymm13 + + /* sSinh_r = r + r*(r^2*(a3+r^2*a5)) */ + vfmadd213ps %ymm0, %ymm0, %ymm13 + + /* + * sinh(X) = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) + * sOut = (a4 +a6*sR2) + */ + vmovups _sPC6+__svml_scosh_data_internal(%rip), %ymm0 + vfmadd213ps _sPC4+__svml_scosh_data_internal(%rip), %ymm2, %ymm0 + + /* sOut = a2+sR2*(a4+a6*sR2) */ + vfmadd213ps _sPC2+__svml_scosh_data_internal(%rip), %ymm2, %ymm0 + + /* sOut = sR2*(a2+sR2*(a4+a6*sR2) */ + vmulps %ymm0, %ymm2, %ymm15 + + /* sOut = sG2*sR2*(a2+sR2*(a4+a6*sR2) */ + vmulps %ymm15, %ymm3, %ymm14 + + /* sOut = sG1*sinh(dR)+sG2*sR2*(a2+sR2*(a4+a6*sR2) */ + vfmadd213ps %ymm14, %ymm13, %ymm4 + vmovmskps %ymm6, %edx + + /* sOut = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) */ + vaddps %ymm4, %ymm3, %ymm0 + + /* Ret H */ + testl %edx, %edx + + /* Go to special inputs processing branch */ + jne L(SPECIAL_VALUES_BRANCH) + # LOE rbx r12 r13 r14 r15 edx ymm0 ymm1 + + /* Restore registers + * and exit the function + */ L(EXIT): - movq %rbp, %rsp - popq %rbp - cfi_def_cfa(7, 8) - cfi_restore(6) - ret - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - -/* Branch to process - * special inputs - */ + movq %rbp, %rsp + popq %rbp + cfi_def_cfa(7, 8) + cfi_restore(6) + ret + cfi_def_cfa(6, 16) + cfi_offset(6, -16) + + /* Branch to process + * special inputs + */ L(SPECIAL_VALUES_BRANCH): - vmovups %ymm1, 32(%rsp) - vmovups %ymm0, 64(%rsp) - # LOE rbx r12 r13 r14 r15 edx ymm0 - - xorl %eax, %eax - # LOE rbx r12 r13 r14 r15 eax edx - - vzeroupper - movq %r12, 16(%rsp) - /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */ - .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22 - movl %eax, %r12d - movq %r13, 8(%rsp) - /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */ - .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22 - movl %edx, %r13d - movq %r14, (%rsp) - /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */ - .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22 - # LOE rbx r15 r12d r13d - -/* Range mask - * bits check - */ + vmovups %ymm1, 32(%rsp) + vmovups %ymm0, 64(%rsp) + # LOE rbx r12 r13 r14 r15 edx ymm0 + + xorl %eax, %eax + # LOE rbx r12 r13 r14 r15 eax edx + + vzeroupper + movq %r12, 16(%rsp) + /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */ + .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22 + movl %eax, %r12d + movq %r13, 8(%rsp) + /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */ + .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22 + movl %edx, %r13d + movq %r14, (%rsp) + /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */ + .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22 + # LOE rbx r15 r12d r13d + + /* Range mask + * bits check + */ L(RANGEMASK_CHECK): - btl %r12d, %r13d + btl %r12d, %r13d -/* Call scalar math function */ - jc L(SCALAR_MATH_CALL) - # LOE rbx r15 r12d r13d + /* Call scalar math function */ + jc L(SCALAR_MATH_CALL) + # LOE rbx r15 r12d r13d -/* Special inputs - * processing loop - */ + /* Special inputs + * processing loop + */ L(SPECIAL_VALUES_LOOP): - incl %r12d - cmpl $8, %r12d - -/* Check bits in range mask */ - jl L(RANGEMASK_CHECK) - # LOE rbx r15 r12d r13d - - movq 16(%rsp), %r12 - cfi_restore(12) - movq 8(%rsp), %r13 - cfi_restore(13) - movq (%rsp), %r14 - cfi_restore(14) - vmovups 64(%rsp), %ymm0 - -/* Go to exit */ - jmp L(EXIT) - /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */ - .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22 - /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */ - .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22 - /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */ - .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22 - # LOE rbx r12 r13 r14 r15 ymm0 - -/* Scalar math fucntion call - * to process special input - */ + incl %r12d + cmpl $8, %r12d + + /* Check bits in range mask */ + jl L(RANGEMASK_CHECK) + # LOE rbx r15 r12d r13d + + movq 16(%rsp), %r12 + cfi_restore(12) + movq 8(%rsp), %r13 + cfi_restore(13) + movq (%rsp), %r14 + cfi_restore(14) + vmovups 64(%rsp), %ymm0 + + /* Go to exit */ + jmp L(EXIT) + /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */ + .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22 + /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */ + .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22 + /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */ + .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22 + # LOE rbx r12 r13 r14 r15 ymm0 + + /* Scalar math fucntion call + * to process special input + */ L(SCALAR_MATH_CALL): - movl %r12d, %r14d - movss 32(%rsp,%r14,4), %xmm0 - call coshf@PLT - # LOE rbx r14 r15 r12d r13d xmm0 + movl %r12d, %r14d + movss 32(%rsp, %r14, 4), %xmm0 + call coshf@PLT + # LOE rbx r14 r15 r12d r13d xmm0 - movss %xmm0, 64(%rsp,%r14,4) + movss %xmm0, 64(%rsp, %r14, 4) -/* Process special inputs in loop */ - jmp L(SPECIAL_VALUES_LOOP) - # LOE rbx r15 r12d r13d + /* Process special inputs in loop */ + jmp L(SPECIAL_VALUES_LOOP) + # LOE rbx r15 r12d r13d END(_ZGVdN8v_coshf_avx2) - .section .rodata, "a" - .align 32 + .section .rodata, "a" + .align 32 #ifdef __svml_scosh_data_internal_typedef typedef unsigned int VUINT32; -typedef struct -{ - __declspec(align(32)) VUINT32 _sInvLn2[8][1]; - __declspec(align(32)) VUINT32 _sLn2hi[8][1]; - __declspec(align(32)) VUINT32 _sLn2lo[8][1]; - __declspec(align(32)) VUINT32 _sSign[8][1]; - __declspec(align(32)) VUINT32 _sShifter[8][1]; - __declspec(align(32)) VUINT32 _iDomainRange[8][1]; - __declspec(align(32)) VUINT32 _sPC1[8][1]; - __declspec(align(32)) VUINT32 _sPC2[8][1]; - __declspec(align(32)) VUINT32 _sPC3[8][1]; - __declspec(align(32)) VUINT32 _sPC4[8][1]; - __declspec(align(32)) VUINT32 _sPC5[8][1]; - __declspec(align(32)) VUINT32 _sPC6[8][1]; - __declspec(align(32)) VUINT32 _iHalf[8][1]; +typedef struct { + __declspec(align(32)) VUINT32 _sInvLn2[8][1]; + __declspec(align(32)) VUINT32 _sLn2hi[8][1]; + __declspec(align(32)) VUINT32 _sLn2lo[8][1]; + __declspec(align(32)) VUINT32 _sSign[8][1]; + __declspec(align(32)) VUINT32 _sShifter[8][1]; + __declspec(align(32)) VUINT32 _iDomainRange[8][1]; + __declspec(align(32)) VUINT32 _sPC1[8][1]; + __declspec(align(32)) VUINT32 _sPC2[8][1]; + __declspec(align(32)) VUINT32 _sPC3[8][1]; + __declspec(align(32)) VUINT32 _sPC4[8][1]; + __declspec(align(32)) VUINT32 _sPC5[8][1]; + __declspec(align(32)) VUINT32 _sPC6[8][1]; + __declspec(align(32)) VUINT32 _iHalf[8][1]; } __svml_scosh_data_internal; #endif __svml_scosh_data_internal: - .long 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B /* _sInvLn2 */ //k=0 - .align 32 - .long 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000 /* _sLn2hi */ - .align 32 - .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4 /* _sLn2lo */ - .align 32 - .long 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 /* _sSign */ - .align 32 - .long 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000 /* _sShifter */ - .align 32 - .long 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E /* _iDomainRange */ - .align 32 - .long 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000 /* _sPC1=1 */ - .align 32 - .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _sPC2 */ - .align 32 - .long 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57 /* _sPC3 */ - .align 32 - .long 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72 /* _sPC4 */ - .align 32 - .long 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461 /* _sPC5 */ - .align 32 - .long 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3 /* _sPC6 */ - // Integer constants - .align 32 - .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _iHalf*/ - .align 32 - .type __svml_scosh_data_internal,@object - .size __svml_scosh_data_internal,.-__svml_scosh_data_internal + .long 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B /* _sInvLn2 */ // k=0 + .align 32 + .long 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000 /* _sLn2hi */ + .align 32 + .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4 /* _sLn2lo */ + .align 32 + .long 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 /* _sSign */ + .align 32 + .long 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000 /* _sShifter */ + .align 32 + .long 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E /* _iDomainRange */ + .align 32 + .long 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000 /* _sPC1=1 */ + .align 32 + .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _sPC2 */ + .align 32 + .long 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57 /* _sPC3 */ + .align 32 + .long 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72 /* _sPC4 */ + .align 32 + .long 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461 /* _sPC5 */ + .align 32 + .long 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3 /* _sPC6 */ + // Integer constants + .align 32 + .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _iHalf */ + .align 32 + .type __svml_scosh_data_internal, @object + .size __svml_scosh_data_internal, .-__svml_scosh_data_internal