Message ID | 1559848943-9717-1-git-send-email-pc@us.ibm.com |
---|---|
State | New |
Headers | show |
Series | [powerpc] fegetround: utilize faster method to get rounding mode | expand |
"Paul A. Clarke" <pc@us.ibm.com> writes: > From: "Paul A. Clarke" <pc@us.ibm.com> > > Add support to use 'mffsl' instruction if compiled for POWER9 (or later). > > 2019-06-06 Paul A. Clarke <pc@us.ibm.com> > > * sysdeps/powerpc/bits/fenvinline.h (__fegetround): Add new > implementation for _ARCH_PWR9. I think you can use this ChangeLog format instead: * sysdeps/powerpc/bits/fenvinline.h [_ARCH_PWR9] (__fegetround): ... > diff --git a/sysdeps/powerpc/bits/fenvinline.h b/sysdeps/powerpc/bits/fenvinline.h > index 7079d1a..ba23da1 100644 > --- a/sysdeps/powerpc/bits/fenvinline.h > +++ b/sysdeps/powerpc/bits/fenvinline.h > @@ -19,12 +19,21 @@ > #if defined __GNUC__ && !defined _SOFT_FLOAT && !defined __NO_FPRS__ > > /* Inline definition for fegetround. */ > +#ifdef _ARCH_PWR9 > +# define __fegetround() \ > + __extension__ ({ \ > + union { double __d; unsigned long long __ll; } __u; \ > + __asm__ ("mffsl %0" : "=f" (__u.__d)); \ > + __u.__ll & 0x0000000000000003LL; \ > + }) > +#else > # define __fegetround() \ > (__extension__ ({ int __fegetround_result; \ > __asm__ __volatile__ \ > ("mcrfs 7,7 ; mfcr %0" \ > : "=r"(__fegetround_result) : : "cr7"); \ > __fegetround_result & 3; })) > +#endif After applying this patch, I started seeing failures on math/test-fenv-tls when using GCC 9.1 on POWER9. I'm configuring with --with-cpu=power9 I can't reproduce it with GCC 8.3. There are only 2 mffsl in test_round(). This is suspicious.
diff --git a/sysdeps/powerpc/bits/fenvinline.h b/sysdeps/powerpc/bits/fenvinline.h index 7079d1a..ba23da1 100644 --- a/sysdeps/powerpc/bits/fenvinline.h +++ b/sysdeps/powerpc/bits/fenvinline.h @@ -19,12 +19,21 @@ #if defined __GNUC__ && !defined _SOFT_FLOAT && !defined __NO_FPRS__ /* Inline definition for fegetround. */ +#ifdef _ARCH_PWR9 +# define __fegetround() \ + __extension__ ({ \ + union { double __d; unsigned long long __ll; } __u; \ + __asm__ ("mffsl %0" : "=f" (__u.__d)); \ + __u.__ll & 0x0000000000000003LL; \ + }) +#else # define __fegetround() \ (__extension__ ({ int __fegetround_result; \ __asm__ __volatile__ \ ("mcrfs 7,7 ; mfcr %0" \ : "=r"(__fegetround_result) : : "cr7"); \ __fegetround_result & 3; })) +#endif # define fegetround() __fegetround () # ifndef __NO_MATH_INLINES
From: "Paul A. Clarke" <pc@us.ibm.com> Add support to use 'mffsl' instruction if compiled for POWER9 (or later). 2019-06-06 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/bits/fenvinline.h (__fegetround): Add new implementation for _ARCH_PWR9. --- sysdeps/powerpc/bits/fenvinline.h | 9 +++++++++ 1 file changed, 9 insertions(+)