From patchwork Thu Jun 1 20:12:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddhesh Poyarekar X-Patchwork-Id: 769939 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wdz6w67jqz9sNJ for ; Fri, 2 Jun 2017 06:13:12 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="tuYTZwiF"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=gv02sMP0Ix7I3PAlZckSVPmQfkzWVCl j+D22s+kzbDldJjLFSgOvlEP1MsNBhBiDjeWIxnHw8JGs9pP3cO6IetwuM3VF6e2 C0j9IWrowXGXiERrsSOoAPN8IvnM9GHRtGTzxHg7vUtcoYNyJmZg9cd4rntbFXP+ cLIpPsr/8ZDk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references; s=default; bh=fRkGTsvcXWD9jJcToUIcHgz2XbA=; b=tuYTZ wiF+sfiz1MaFXXCFE8HHOHNa3CKWEmfl489N+WdKxSB0J4w6Be7IsCns7VNsWoAw 4jlj3F4T/taA8/PbPv3rWBZ+vgxVxqgJ46JQpY2v9SM46yFF4av2sfyZBRbCGdp1 U0e6YzgitApFKz9wA/vstzTxDiH036Y/SY8iew= Received: (qmail 52473 invoked by alias); 1 Jun 2017 20:12:31 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 51080 invoked by uid 89); 1 Jun 2017 20:12:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_NEUTRAL autolearn=ham version=3.3.2 spammy=influence, online X-HELO: homiemail-a92.g.dreamhost.com From: Siddhesh Poyarekar To: libc-alpha@sourceware.org Cc: adhemerval.zanella@linaro.org, sellcey@cavium.com Subject: [PATCH 2/6] tunables: Add LD_HWCAP_MASK to tunables Date: Fri, 2 Jun 2017 01:42:04 +0530 Message-Id: <1496347928-19432-3-git-send-email-siddhesh@sourceware.org> In-Reply-To: <1496347928-19432-1-git-send-email-siddhesh@sourceware.org> References: <1496347928-19432-1-git-send-email-siddhesh@sourceware.org> Add LD_HWCAP_MASK to tunables in preparation of it being removed from rtld.c. This allows us to read LD_HWCAP_MASK much earlier so that it can influence IFUNC resolution in aarch64. This patch does not actually do anything other than read the LD_HWCAP_MASK variable and add the tunables way to set the LD_HWCAP_MASK, i.e. via the glibc.tune.hwcap_mask tunable. In a follow-up patch, the _dl_hwcap_mask will be replaced with glibc.tune.hwcap_mask to complete the transition. * elf/dl-tunables.list: Add glibc.tune.hwcap_mask. * scripts/gen-tunables.awk: Include dl-procinfo.h. * manual/tunables.texi: Document glibc.tune.hwcap_mask. --- elf/dl-tunables.list | 7 +++++++ manual/tunables.texi | 23 +++++++++++++++++++++++ scripts/gen-tunables.awk | 1 + 3 files changed, 31 insertions(+) diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list index b9f1488..41ce9af 100644 --- a/elf/dl-tunables.list +++ b/elf/dl-tunables.list @@ -77,4 +77,11 @@ glibc { security_level: SXID_IGNORE } } + tune { + hwcap_mask { + type: UINT_64 + env_alias: LD_HWCAP_MASK + default: HWCAP_IMPORTANT + } + } } diff --git a/manual/tunables.texi b/manual/tunables.texi index ac8c38f..c9a4cb7 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -31,6 +31,8 @@ their own namespace. @menu * Tunable names:: The structure of a tunable name * Memory Allocation Tunables:: Tunables in the memory allocation subsystem +* Hardware Capability Tunables:: Tunables that modify the hardware + capabilities seen by @theglibc{} @end menu @node Tunable names @@ -190,3 +192,24 @@ number of arenas is determined by the number of CPU cores online. For 32-bit systems the limit is twice the number of cores online and on 64-bit systems, it is 8 times the number of cores online. @end deftp + +@node Hardware Capability Tunables +@section Hardware Capability Tunables +@cindex hardware capability tunables +@cindex hwcap tunables +@cindex tunables, hwcap + +@deftp {Tunable namespace} glibc.tune +Behavior of @theglibc{} can be tuned to assume specific hardware capabilities +by setting the following tunables in the @code{tune} namespace: +@end deftp + +@deftp Tunable glibc.tune.hwcap_mask +This tunable supersedes the @env{LD_HWCAP_MASK} environment variable and is +identical in features. + +The @code{AT_HWCAP} key in the Auxilliary Vector specifies instruction set +extensions available in the processor at runtime for some architectures. The +@code{glibc.tune.hwcap_mask} tunable allows the user to mask out those +capabilities at runtime, thus disabling use of those extensions. +@end deftp diff --git a/scripts/gen-tunables.awk b/scripts/gen-tunables.awk index b10b00e..93e5aff 100644 --- a/scripts/gen-tunables.awk +++ b/scripts/gen-tunables.awk @@ -134,6 +134,7 @@ END { print "# error \"Do not include this file directly.\"" print "# error \"Include tunables.h instead.\"" print "#endif" + print "#include \n" # Now, the enum names print "\ntypedef enum"