From patchwork Tue Feb 23 05:40:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajalakshmi Srinivasaraghavan X-Patchwork-Id: 586665 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E5F8D140BC6 for ; Tue, 23 Feb 2016 16:41:00 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b=Bf0L5AyC; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id; q=dns; s= default; b=whOXYSoKwD/bJN4XZnrf0+beNYwEeZcUFzc++N3RB5yObas66I7tH 4chyU49ew9lW2FZjUy7lir+SRcTwPiDkTb88rp9Q+T4vkWSza3xLYPmDdLHRsRYz zFKx3N79V2/nHd+Ke2nUodwI5br7eEneah2kuoJxUBwnIjDKZtN2Gc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id; s=default; bh=6BdllH5mDRQsOb8wi+q6Ha/huao=; b=Bf0L5AyC88EBRhkdihKEoczc+Ih1 lA5lajoVpU4MUSins6LIhFzy1xdiOWhqXtfHTJ/OG+WijltiWzfdMPfQhkOSFE0x UdS9LxjQoCrerdoV+JDABfoxdRM0OhQJyXHVHsAX7tmRjiinhmT9P7ap34/xy+YE aTSNuJXGJ/jYhrU= Received: (qmail 44240 invoked by alias); 23 Feb 2016 05:40:52 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 44227 invoked by uid 89); 23 Feb 2016 05:40:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.8 required=5.0 tests=BAYES_50, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=power7, 2432, cr1, Load X-HELO: e28smtp08.in.ibm.com X-IBM-Helo: d28relay04.in.ibm.com X-IBM-MailFrom: raji@linux.vnet.ibm.com X-IBM-RcptTo: libc-alpha@sourceware.org From: Rajalakshmi Srinivasaraghavan To: libc-alpha@sourceware.org Cc: Rajalakshmi Srinivasaraghavan Subject: [PATCH] Rearrange cfi_offset calls Date: Tue, 23 Feb 2016 11:10:34 +0530 Message-Id: <1456206034-32037-1-git-send-email-raji@linux.vnet.ibm.com> X-TM-AS-MML: disable x-cbid: 16022305-0029-0000-0000-00000B106A05 This patch rearranges cfi_offset() calls after the last store so as to avoid extra DW_CFA_advance opcodes in unwind information. 2016-01-20 Rajalakshmi Srinivasaraghavan * sysdeps/powerpc/powerpc32/power4/memcmp.S: Rearrange cfi_offset calls. * sysdeps/powerpc/powerpc32/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: Likewise. --- sysdeps/powerpc/powerpc32/power4/memcmp.S | 12 ++++++------ sysdeps/powerpc/powerpc32/power6/memcpy.S | 2 +- sysdeps/powerpc/powerpc32/power7/memcmp.S | 12 ++++++------ sysdeps/powerpc/powerpc64/power4/memcmp.S | 12 ++++++------ sysdeps/powerpc/powerpc64/power7/memcmp.S | 22 +++++++++++----------- sysdeps/powerpc/powerpc64/power7/strstr.S | 8 ++++---- 6 files changed, 34 insertions(+), 34 deletions(-) diff --git a/sysdeps/powerpc/powerpc32/power4/memcmp.S b/sysdeps/powerpc/powerpc32/power4/memcmp.S index 602a795..9cb116e 100644 --- a/sysdeps/powerpc/powerpc32/power4/memcmp.S +++ b/sysdeps/powerpc/powerpc32/power4/memcmp.S @@ -54,8 +54,8 @@ EALIGN (memcmp, 4, 0) stwu 1, -64(r1) cfi_adjust_cfa_offset(64) stw rWORD8, 48(r1) - cfi_offset(rWORD8, (48-64)) stw rWORD7, 44(r1) + cfi_offset(rWORD8, (48-64)) cfi_offset(rWORD7, (44-64)) bne L(unaligned) /* At this point we know both strings have the same alignment and the @@ -747,18 +747,18 @@ L(unaligned): the actual start of rSTR2. */ clrrwi rSTR2, rSTR2, 2 stw rWORD2_SHIFT, 28(r1) - cfi_offset(rWORD2_SHIFT, (28-64)) /* Compute the left/right shift counts for the unaligned rSTR2, compensating for the logical (W aligned) start of rSTR1. */ clrlwi rSHL, rWORD8_SHIFT, 30 clrrwi rSTR1, rSTR1, 2 stw rWORD4_SHIFT, 24(r1) - cfi_offset(rWORD4_SHIFT, (24-64)) slwi rSHL, rSHL, 3 cmplw cr5, rWORD8_SHIFT, rSTR2 add rN, rN, r12 slwi rWORD6, r12, 3 stw rWORD6_SHIFT, 20(r1) + cfi_offset(rWORD2_SHIFT, (28-64)) + cfi_offset(rWORD4_SHIFT, (24-64)) cfi_offset(rWORD6_SHIFT, (20-64)) subfic rSHR, rSHL, 32 srwi r0, rN, 4 /* Divide by 16 */ @@ -852,15 +852,15 @@ L(duPs4): .align 4 L(Wunaligned): stw rWORD8_SHIFT, 32(r1) - cfi_offset(rWORD8_SHIFT, (32-64)) clrrwi rSTR2, rSTR2, 2 stw rWORD2_SHIFT, 28(r1) - cfi_offset(rWORD2_SHIFT, (28-64)) srwi r0, rN, 4 /* Divide by 16 */ stw rWORD4_SHIFT, 24(r1) - cfi_offset(rWORD4_SHIFT, (24-64)) andi. r12, rN, 12 /* Get the W remainder */ stw rWORD6_SHIFT, 20(r1) + cfi_offset(rWORD8_SHIFT, (32-64)) + cfi_offset(rWORD2_SHIFT, (28-64)) + cfi_offset(rWORD4_SHIFT, (24-64)) cfi_offset(rWORD6_SHIFT, (20-64)) slwi rSHL, rSHL, 3 #ifdef __LITTLE_ENDIAN__ diff --git a/sysdeps/powerpc/powerpc32/power6/memcpy.S b/sysdeps/powerpc/powerpc32/power6/memcpy.S index 6dff0ed..ae796a2 100644 --- a/sysdeps/powerpc/powerpc32/power6/memcpy.S +++ b/sysdeps/powerpc/powerpc32/power6/memcpy.S @@ -46,8 +46,8 @@ EALIGN (memcpy, 5, 0) ble- cr1,L(word_unaligned_short) /* If move < 32 bytes. */ cmplw cr6,10,11 stw 31,24(1) - cfi_offset(31,(24-32)) stw 30,20(1) + cfi_offset(31,(24-32)) cfi_offset(30,(20-32)) mr 30,3 beq .L0 diff --git a/sysdeps/powerpc/powerpc32/power7/memcmp.S b/sysdeps/powerpc/powerpc32/power7/memcmp.S index 9c06a89..13e8492 100644 --- a/sysdeps/powerpc/powerpc32/power7/memcmp.S +++ b/sysdeps/powerpc/powerpc32/power7/memcmp.S @@ -54,8 +54,8 @@ EALIGN (memcmp, 4, 0) stwu 1, -64(r1) cfi_adjust_cfa_offset(64) stw rWORD8, 48(r1) - cfi_offset(rWORD8, (48-64)) stw rWORD7, 44(r1) + cfi_offset(rWORD8, (48-64)) cfi_offset(rWORD7, (44-64)) bne L(unaligned) /* At this point we know both strings have the same alignment and the @@ -747,18 +747,18 @@ L(unaligned): the actual start of rSTR2. */ clrrwi rSTR2, rSTR2, 2 stw rWORD2_SHIFT, 28(r1) - cfi_offset(rWORD2_SHIFT, (28-64)) /* Compute the left/right shift counts for the unaligned rSTR2, compensating for the logical (W aligned) start of rSTR1. */ clrlwi rSHL, rWORD8_SHIFT, 30 clrrwi rSTR1, rSTR1, 2 stw rWORD4_SHIFT, 24(r1) - cfi_offset(rWORD4_SHIFT, (24-64)) slwi rSHL, rSHL, 3 cmplw cr5, rWORD8_SHIFT, rSTR2 add rN, rN, r12 slwi rWORD6, r12, 3 stw rWORD6_SHIFT, 20(r1) + cfi_offset(rWORD2_SHIFT, (28-64)) + cfi_offset(rWORD4_SHIFT, (24-64)) cfi_offset(rWORD6_SHIFT, (20-64)) subfic rSHR, rSHL, 32 srwi r0, rN, 4 /* Divide by 16 */ @@ -852,15 +852,15 @@ L(duPs4): .align 4 L(Wunaligned): stw rWORD8_SHIFT, 32(r1) - cfi_offset(rWORD8_SHIFT, (32-64)) clrrwi rSTR2, rSTR2, 2 stw rWORD2_SHIFT, 28(r1) - cfi_offset(rWORD2_SHIFT, (28-64)) srwi r0, rN, 4 /* Divide by 16 */ stw rWORD4_SHIFT, 24(r1) - cfi_offset(rWORD4_SHIFT, (24-64)) andi. r12, rN, 12 /* Get the W remainder */ stw rWORD6_SHIFT, 20(r1) + cfi_offset(rWORD8_SHIFT, (32-64)) + cfi_offset(rWORD2_SHIFT, (28-64)) + cfi_offset(rWORD4_SHIFT, (24-64)) cfi_offset(rWORD6_SHIFT, (20-64)) slwi rSHL, rSHL, 3 #ifdef __LITTLE_ENDIAN__ diff --git a/sysdeps/powerpc/powerpc64/power4/memcmp.S b/sysdeps/powerpc/powerpc64/power4/memcmp.S index c1a77c6..65c6596 100644 --- a/sysdeps/powerpc/powerpc64/power4/memcmp.S +++ b/sysdeps/powerpc/powerpc64/power4/memcmp.S @@ -52,8 +52,8 @@ EALIGN (memcmp, 4, 0) byte loop. */ blt cr1, L(bytealigned) std rWORD8, -8(r1) - cfi_offset(rWORD8, -8) std rWORD7, -16(r1) + cfi_offset(rWORD8, -8) cfi_offset(rWORD7, -16) bne L(unaligned) /* At this point we know both strings have the same alignment and the @@ -728,18 +728,18 @@ L(unaligned): the actual start of rSTR2. */ clrrdi rSTR2, rSTR2, 3 std rWORD2_SHIFT, -48(r1) - cfi_offset(rWORD2_SHIFT, -48) /* Compute the left/right shift counts for the unaligned rSTR2, compensating for the logical (DW aligned) start of rSTR1. */ clrldi rSHL, rWORD8_SHIFT, 61 clrrdi rSTR1, rSTR1, 3 std rWORD4_SHIFT, -56(r1) - cfi_offset(rWORD4_SHIFT, -56) sldi rSHL, rSHL, 3 cmpld cr5, rWORD8_SHIFT, rSTR2 add rN, rN, r12 sldi rWORD6, r12, 3 std rWORD6_SHIFT, -64(r1) + cfi_offset(rWORD2_SHIFT, -48) + cfi_offset(rWORD4_SHIFT, -56) cfi_offset(rWORD6_SHIFT, -64) subfic rSHR, rSHL, 64 srdi r0, rN, 5 /* Divide by 32 */ @@ -833,15 +833,15 @@ L(duPs4): .align 4 L(DWunaligned): std rWORD8_SHIFT, -40(r1) - cfi_offset(rWORD8_SHIFT, -40) clrrdi rSTR2, rSTR2, 3 std rWORD2_SHIFT, -48(r1) - cfi_offset(rWORD2_SHIFT, -48) srdi r0, rN, 5 /* Divide by 32 */ std rWORD4_SHIFT, -56(r1) - cfi_offset(rWORD4_SHIFT, -56) andi. r12, rN, 24 /* Get the DW remainder */ std rWORD6_SHIFT, -64(r1) + cfi_offset(rWORD8_SHIFT, -40) + cfi_offset(rWORD2_SHIFT, -48) + cfi_offset(rWORD4_SHIFT, -56) cfi_offset(rWORD6_SHIFT, -64) sldi rSHL, rSHL, 3 #ifdef __LITTLE_ENDIAN__ diff --git a/sysdeps/powerpc/powerpc64/power7/memcmp.S b/sysdeps/powerpc/powerpc64/power7/memcmp.S index 4be2900..881c7d5 100644 --- a/sysdeps/powerpc/powerpc64/power7/memcmp.S +++ b/sysdeps/powerpc/powerpc64/power7/memcmp.S @@ -82,17 +82,17 @@ EALIGN (memcmp, 4, 0) byte loop. */ blt cr1, L(bytealigned) std rWORD8, rWORD8SAVE(r1) - cfi_offset(rWORD8, rWORD8SAVE) std rWORD7, rWORD7SAVE(r1) - cfi_offset(rWORD7, rWORD7SAVE) std rOFF8, rOFF8SAVE(r1) - cfi_offset(rWORD7, rOFF8SAVE) std rOFF16, rOFF16SAVE(r1) - cfi_offset(rWORD7, rOFF16SAVE) std rOFF24, rOFF24SAVE(r1) - cfi_offset(rWORD7, rOFF24SAVE) std rOFF32, rOFF32SAVE(r1) - cfi_offset(rWORD7, rOFF32SAVE) + cfi_offset(rWORD8, rWORD8SAVE) + cfi_offset(rWORD7, rWORD7SAVE) + cfi_offset(rOFF8, rOFF8SAVE) + cfi_offset(rOFF16, rOFF16SAVE) + cfi_offset(rOFF24, rOFF24SAVE) + cfi_offset(rOFF32, rOFF32SAVE) li rOFF8,8 li rOFF16,16 @@ -601,18 +601,18 @@ L(unaligned): the actual start of rSTR2. */ clrrdi rSTR2, rSTR2, 3 std rWORD2_SHIFT, rWORD2SHIFTSAVE(r1) - cfi_offset(rWORD2_SHIFT, rWORD2SHIFTSAVE) /* Compute the left/right shift counts for the unaligned rSTR2, compensating for the logical (DW aligned) start of rSTR1. */ clrldi rSHL, rWORD8_SHIFT, 61 clrrdi rSTR1, rSTR1, 3 std rWORD4_SHIFT, rWORD4SHIFTSAVE(r1) - cfi_offset(rWORD4_SHIFT, rWORD4SHIFTSAVE) sldi rSHL, rSHL, 3 cmpld cr5, rWORD8_SHIFT, rSTR2 add rN, rN, r12 sldi rWORD6, r12, 3 std rWORD6_SHIFT, rWORD6SHIFTSAVE(r1) + cfi_offset(rWORD2_SHIFT, rWORD2SHIFTSAVE) + cfi_offset(rWORD4_SHIFT, rWORD4SHIFTSAVE) cfi_offset(rWORD6_SHIFT, rWORD6SHIFTSAVE) subfic rSHR, rSHL, 64 srdi r0, rN, 5 /* Divide by 32 */ @@ -689,15 +689,15 @@ L(duPs4): .align 4 L(DWunaligned): std rWORD8_SHIFT, rWORD8SHIFTSAVE(r1) - cfi_offset(rWORD8_SHIFT, rWORD8SHIFTSAVE) clrrdi rSTR2, rSTR2, 3 std rWORD2_SHIFT, rWORD2SHIFTSAVE(r1) - cfi_offset(rWORD2_SHIFT, rWORD2SHIFTSAVE) srdi r0, rN, 5 /* Divide by 32 */ std rWORD4_SHIFT, rWORD4SHIFTSAVE(r1) - cfi_offset(rWORD4_SHIFT, rWORD4SHIFTSAVE) andi. r12, rN, 24 /* Get the DW remainder */ std rWORD6_SHIFT, rWORD6SHIFTSAVE(r1) + cfi_offset(rWORD8_SHIFT, rWORD8SHIFTSAVE) + cfi_offset(rWORD2_SHIFT, rWORD2SHIFTSAVE) + cfi_offset(rWORD4_SHIFT, rWORD4SHIFTSAVE) cfi_offset(rWORD6_SHIFT, rWORD6SHIFTSAVE) sldi rSHL, rSHL, 3 LD rWORD6, 0, rSTR2 diff --git a/sysdeps/powerpc/powerpc64/power7/strstr.S b/sysdeps/powerpc/powerpc64/power7/strstr.S index fefac1c..0e18193 100644 --- a/sysdeps/powerpc/powerpc64/power7/strstr.S +++ b/sysdeps/powerpc/powerpc64/power7/strstr.S @@ -59,14 +59,14 @@ EALIGN (strstr, 4, 0) CALL_MCOUNT 2 mflr r0 /* Load link register LR to r0. */ std r31, -8(r1) /* Save callers register r31. */ - cfi_offset(r31, -8) std r30, -16(r1) /* Save callers register r30. */ - cfi_offset(r30, -16) std r29, -24(r1) /* Save callers register r29. */ - cfi_offset(r29, -24) std r28, -32(r1) /* Save callers register r28. */ - cfi_offset(r28, -32) std r0, 16(r1) /* Store the link register. */ + cfi_offset(r31, -8) + cfi_offset(r30, -16) + cfi_offset(r28, -32) + cfi_offset(r29, -24) cfi_offset(lr, 16) stdu r1, -FRAMESIZE(r1) /* Create the stack frame. */ cfi_adjust_cfa_offset(FRAMESIZE)