From patchwork Sat Oct 1 19:09:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 1685271 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=aurel32.net header.i=@aurel32.net header.a=rsa-sha256 header.s=202004.hall header.b=m3kXnG07; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MfxVw1C9Gz1yqj for ; Sun, 2 Oct 2022 06:10:00 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D942D385020F for ; Sat, 1 Oct 2022 19:09:51 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from hall.aurel32.net (hall.aurel32.net [IPv6:2001:bc8:30d7:100::1]) by sourceware.org (Postfix) with ESMTPS id 65A033858430 for ; Sat, 1 Oct 2022 19:09:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 65A033858430 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=aurel32.net Authentication-Results: sourceware.org; spf=none smtp.mailfrom=aurel32.net DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=Content-Transfer-Encoding:MIME-Version:Message-Id:Date: Subject:Cc:To:From:Content-Type:From:Reply-To:Subject:Content-ID: Content-Description:In-Reply-To:References:X-Debbugs-Cc; bh=lwHJLztcXV/YOKLP+NPdXT5V7cZiJYUlAOFn422g8TU=; b=m3kXnG077j0StNPgCHRDkwIQVg FIPwrF15rDNerFF+JWT16vurqtaSSkUfjiAmrMaB6uqDc4hLEiaS9CZI0SvO7on+iSrL143YFTnMH Azu7u5dIZ79Bn1+SWyJgRbYQolEAlGeBNszow4d9WCzP8/H/2KDCjOFs9+Lgz9UwWmWd6rERPvUDw UUrKv8wjf5FY3rCNik3Q95TNXAx6O3+L3zNURQ21HF2xt/2QcxwDx61aVZl54/jAJCmq645tv7S8F hgFGdVF3O2hLQ7gqxIrESpWUiLMMqPAMiSNwLtRbbdjX9fULi6KIQWpu5GC8xDmN0VEAHLDxq5n4K zQRhgDgA==; Received: from [2a01:e34:ec5d:a741:8a4c:7c4e:dc4c:1787] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oehrQ-00Ermz-3h; Sat, 01 Oct 2022 21:09:16 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.96) (envelope-from ) id 1oehrN-00CZ0P-10; Sat, 01 Oct 2022 21:09:13 +0200 From: Aurelien Jarno To: libc-alpha@sourceware.org Subject: [PATCH 0/4] x86: Fix AVX2 string functions requiring BMI2 or LZCNT (BZ #29611) Date: Sat, 1 Oct 2022 21:09:07 +0200 Message-Id: <20221001190911.2994478-1-aurelien@aurel32.net> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" Some early Intel Haswell CPU have AVX2 instructions, but do not have BMI2 instructions. Some AVX2 string functions only check for AVX2, but use BMI2 or LZCNT instructions. This patchset tries to fix that. While most fixes only change ifunc-impl-list.c, and thus only concerns the testsuite, the strn(case)cmp is a real issue affecting early Intel Haswell CPU, reported to affect Debian Sid and Fedora Rawhide. On the other hand, the check for LZCNT in memrchr is purely for correctness, I am not aware of a CPU implementing AVX2 without LZCNT. This has been tested by remplacing all BMI2 and LZCNT instruction in the source code by the "ud2" instruction and disabling the BMI1, BMI2 feature detection, and running the testsuite. Resolves: BZ #29611 Aurelien Jarno (4): x86: include BMI1 and BMI2 in x86-64-v3 level x86-64: Require BMI2 for AVX2 strn(case)cmp and wcsncmp implementations x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations x86-64: Require LZCNT for AVX2 memrchr implementation sysdeps/x86/get-isa-level.h | 2 + sysdeps/x86_64/multiarch/ifunc-avx2.h | 1 + sysdeps/x86_64/multiarch/ifunc-impl-list.c | 44 +++++++++++++++------ sysdeps/x86_64/multiarch/ifunc-strcasecmp.h | 1 + sysdeps/x86_64/multiarch/strncmp.c | 4 +- 5 files changed, 38 insertions(+), 14 deletions(-)