From patchwork Mon Aug 12 06:48:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feifei Wang X-Patchwork-Id: 1971446 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Wj4rJ1MBDz1yXl for ; Mon, 12 Aug 2024 16:49:35 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 837B73858D20 for ; Mon, 12 Aug 2024 06:49:33 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mailgw2.hygon.cn (unknown [110.188.70.11]) by sourceware.org (Postfix) with ESMTP id 89B243858D20 for ; Mon, 12 Aug 2024 06:48:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 89B243858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=hygon.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=hygon.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 89B243858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=110.188.70.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1723445330; cv=none; b=UlxdgC46Qr6Qyal2Ar6uAHkLwj1eZ1eek344wcK2t3rCHxXzvZzZzZJbJ8J4ICNwXSsfyrSzDy+W6CBIQxiAL+jS5gXUto6hj+tngtIthxRN1aRF4jqPB3wfDxAWslfb/lJrn5omS0FmBefb/W0HRLlIN7d1x3f8g/Q9aW8+1aA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1723445330; c=relaxed/simple; bh=MqAUSRdI4ENJqD8Wptsr7XZvoOGOub+T/ptKXbgxw14=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=pu8jKtcpG/BsAPQxZoqN/tMegSQnrdaxo3lZTi7WPyNil1ZzxlpeGuWKJ2yrYPLKEFtYK/OjPLIsDrBvg/bM+M3xsz8QrIkCksRZfNiOI1xd/I8Q5bdG4DeAjlAoO4UNUzJkDsbTyg61z/J8q9lxMES06XmE9+ijkTyAWsz2VoE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from maildlp2.hygon.cn (unknown [172.23.18.61]) by mailgw2.hygon.cn (Postfix) with ESMTP id 3F0433004C93; Mon, 12 Aug 2024 14:44:08 +0800 (CST) Received: from cncheex01.Hygon.cn (unknown [172.23.18.10]) by maildlp2.hygon.cn (Postfix) with ESMTPS id B65F634981D8; Mon, 12 Aug 2024 14:39:38 +0800 (CST) Received: from trace.hygon.cn (172.23.18.45) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 12 Aug 2024 14:48:36 +0800 From: Feifei Wang To: CC: , , , , , Subject: [RFC PATCH 0/3] x86: Add support for Hygon processors Date: Mon, 12 Aug 2024 14:48:22 +0800 Message-ID: <1723445305-99403-1-git-send-email-wangfeifei@hygon.cn> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [172.23.18.45] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org This patch add a new architecture type arch_kind_hygon to spilt Hygon branch from AMD. Furthermore, the third patch uses new cpu-flag 'Prefer_Non_Temporal' to access the non-temporal memset implementation for hygon processors due to erms is disabled in Hygon. The patch is based on the following new flag patch: https://patchwork.sourceware.org/project/glibc/patch/20240811055619.2863839-1-goldstein.w.n@gmail.com/ Feifei Wang (3): x86: Add new architecture type for Hygon processors x86: Add cache information support for Hygon processors x86: Enable non-temporal memset for Hygon processors sysdeps/x86/cpu-features.c | 25 +++++++++++-- sysdeps/x86/dl-cacheinfo.h | 60 ++++++++++++++++++++++++++++++ sysdeps/x86/include/cpu-features.h | 1 + 3 files changed, 83 insertions(+), 3 deletions(-)