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[0/2,v2,powerpc] utilize faster method to get FPSCR

Message ID 1560452241-11638-1-git-send-email-pc@us.ibm.com
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Series utilize faster method to get FPSCR | expand

Message

Paul A. Clarke June 13, 2019, 6:57 p.m. UTC 
From: "Paul A. Clarke" <pc@us.ibm.com>

Using 'mffs' instruction to read the Floating Point Status Control Register
(FPSCR) can force a processor flush in some cases, with undesirable
performance impact.  If the values of the bits in the FPSCR which force the
flush are not needed, an instruction that is new to POWER9 (ISA version 3.0),
'mffsl' can be used instead.

Paul A. Clarke (2):
  [powerpc] add 'volatile' to asm
  [powerpc] Use faster means to access FPSCR when possible in some cases

 sysdeps/powerpc/bits/fenvinline.h | 22 +++++++++++++------
 sysdeps/powerpc/fpu/fegetexcept.c |  2 +-
 sysdeps/powerpc/fpu/fegetmode.c   |  2 +-
 sysdeps/powerpc/fpu/fenv_libc.h   | 23 ++++++++++++++++++--
 sysdeps/powerpc/fpu_control.h     | 45 +++++++++++++++++++++------------------
 5 files changed, 63 insertions(+), 31 deletions(-)