From patchwork Wed Jul 27 16:31:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rainer Orth X-Patchwork-Id: 107128 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id C89C9B6F62 for ; Thu, 28 Jul 2011 02:32:26 +1000 (EST) Received: (qmail 17822 invoked by alias); 27 Jul 2011 16:32:24 -0000 Received: (qmail 17797 invoked by uid 22791); 27 Jul 2011 16:32:23 -0000 X-SWARE-Spam-Status: No, hits=-2.4 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from snape.CeBiTec.Uni-Bielefeld.DE (HELO smtp-relay.CeBiTec.Uni-Bielefeld.DE) (129.70.160.84) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 27 Jul 2011 16:32:04 +0000 Received: from localhost (localhost.CeBiTec.Uni-Bielefeld.DE [127.0.0.1]) by smtp-relay.CeBiTec.Uni-Bielefeld.DE (Postfix) with ESMTP id 4225F83B; Wed, 27 Jul 2011 18:32:03 +0200 (CEST) Received: from smtp-relay.CeBiTec.Uni-Bielefeld.DE ([127.0.0.1]) by localhost (malfoy.CeBiTec.Uni-Bielefeld.DE [127.0.0.1]) (amavisd-new, port 10024) with LMTP id q6Dj06ACXIh1; Wed, 27 Jul 2011 18:31:59 +0200 (CEST) Received: from manam.CeBiTec.Uni-Bielefeld.DE (manam.CeBiTec.Uni-Bielefeld.DE [129.70.161.120]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp-relay.CeBiTec.Uni-Bielefeld.DE (Postfix) with ESMTPS id A8C7183A; Wed, 27 Jul 2011 18:31:59 +0200 (CEST) Received: (from ro@localhost) by manam.CeBiTec.Uni-Bielefeld.DE (8.14.5+Sun/8.14.5/Submit) id p6RGVxDK006904; Wed, 27 Jul 2011 18:31:59 +0200 (MEST) From: Rainer Orth To: gcc-patches@gcc.gnu.org Cc: Richard Sandiford Subject: Support -march=native on IRIX Date: Wed, 27 Jul 2011 18:31:59 +0200 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.3 (usg-unix-v) MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Here's the last of my patches to support -march=native, this time for IRIX. It uses the getenvent(3) family of functions since /proc/cpuinfo is Linux-only. The patch itself is pretty straight forward, the basic approach has been tested in a separate program, and the code compiles :-) I'm waiting for another bootstrap to complete to fully test it. Prompted by rth's response to my Tru64 UNIX/Alpha patch, I had another look at using mfc0 $reg, $15 to access the PRId register directly, but unfortunately that is a privileged operation, just as on SPARC. Ok for mainline if the bootstrap passes? Thanks. Rainer 2011-07-26 Rainer Orth * config/mips/driver-native.c [__sgi__]: Include , . (cpu_types): New array. (cputype): New function. (host_detect_local_cpu): Only define buf, f if !__sgi__. Use scaninvent instead of /proc/cpuinfo if __sgi__. * config.host: Also use driver-native.o, mips/x-native on mips-sgi-irix*. * config/mips/iris6.h [__mips__] (host_detect_local_cpu): Declare. (EXTRA_SPEC_FUNCTIONS, MARCH_MTUNE_NATIVE_SPECS): Define. (DRIVER_SELF_SPECS): Add MARCH_MTUNE_NATIVE_SPECS. diff --git a/gcc/config.host b/gcc/config.host --- a/gcc/config.host +++ b/gcc/config.host @@ -118,9 +118,9 @@ case ${host} in ;; esac ;; - mips*-*-linux*) + mips*-*-linux* | mips-sgi-irix*) case ${target} in - mips*-*-linux*) + mips*-*-linux* | mips-sgi-irix*) host_extra_gcc_objs="driver-native.o" host_xmake_file="${host_xmake_file} mips/x-native" ;; diff --git a/gcc/config/mips/driver-native.c b/gcc/config/mips/driver-native.c --- a/gcc/config/mips/driver-native.c +++ b/gcc/config/mips/driver-native.c @@ -1,5 +1,5 @@ /* Subroutines for the gcc driver. - Copyright (C) 2008 Free Software Foundation, Inc. + Copyright (C) 2008, 2011 Free Software Foundation, Inc. This file is part of GCC. @@ -22,6 +22,59 @@ along with GCC; see the file COPYING3. #include "coretypes.h" #include "tm.h" +#ifdef __sgi__ +#include +#include + +/* Cf. MIPS R10000 Microprocessor User Guide, Version 2.0, 14.13 Processor + Revision Identifier (PRId) Register (15). + + http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_279.html */ + +static const struct cpu_types { + int impl; + const char *cpu; +} cpu_types[] = { + { C0_IMP_R2000, "r2000" }, + { C0_IMP_R3000, "r3000" }, + { C0_IMP_R6000, "r6000" }, + { C0_IMP_R4000, "r4000" }, + { C0_IMP_R6000A, "r6000" }, + { C0_IMP_R10000, "r10000" }, + { C0_IMP_R12000, "r12000" }, + { C0_IMP_R14000, "r14000" }, + { C0_IMP_R8000, "r8000" }, + { C0_IMP_R4600, "r4600" }, + { C0_IMP_R4700, "r4600" }, + { C0_IMP_R4650, "r4650" }, + { C0_IMP_R5000, "vr5000" }, + { C0_IMP_RM7000, "rm7000" }, + { C0_IMP_RM5271, "vr5000" }, + { 0, 0 } +}; + +static int +cputype (inventory_t *inv, void *arg) +{ + if (inv != NULL + && inv->inv_class == INV_PROCESSOR + && inv->inv_type == INV_CPUCHIP) + { + int i; + /* inv_state is the cpu revision number. */ + int impl = (inv->inv_state & C0_IMPMASK) >> C0_IMPSHIFT; + + for (i = 0; cpu_types[i].cpu != NULL; i++) + if (cpu_types[i].impl == impl) + { + *((const char **) arg) = cpu_types[i].cpu; + break; + } + } + return 0; +} +#endif + /* This will be called by the spec parser in gcc.c when it sees a %:local_cpu_detect(args) construct. Currently it will be called with either "arch" or "tune" as argument depending on if -march=native @@ -39,8 +92,10 @@ const char * host_detect_local_cpu (int argc, const char **argv) { const char *cpu = NULL; +#ifndef __sgi__ char buf[128]; FILE *f; +#endif bool arch; if (argc < 1) @@ -50,6 +105,9 @@ host_detect_local_cpu (int argc, const c if (!arch && strcmp (argv[0], "tune")) return NULL; +#ifdef __sgi__ + scaninvent (cputype, &cpu); +#else f = fopen ("/proc/cpuinfo", "r"); if (f == NULL) return NULL; @@ -73,6 +131,7 @@ host_detect_local_cpu (int argc, const c } fclose (f); +#endif if (cpu == NULL) return NULL; diff --git a/gcc/config/mips/iris6.h b/gcc/config/mips/iris6.h --- a/gcc/config/mips/iris6.h +++ b/gcc/config/mips/iris6.h @@ -27,13 +27,28 @@ along with GCC; see the file COPYING3. #undef MULTILIB_DEFAULTS #define MULTILIB_DEFAULTS { "mabi=n32" } +/* -march=native handling only makes sense with compiler running on + a MIPS chip. */ +#if defined(__mips__) +extern const char *host_detect_local_cpu (int argc, const char **argv); +# define EXTRA_SPEC_FUNCTIONS \ + { "local_cpu_detect", host_detect_local_cpu }, + +# define MARCH_MTUNE_NATIVE_SPECS \ + " %{march=native:%