diff mbox

Do not use TYPE_CANONICAL in useless_type_conversion

Message ID orsi5f42cs.fsf@livre.home
State New
Headers show

Commit Message

Alexandre Oliva Oct. 13, 2015, 8:08 a.m. UTC
On Oct  9, 2015, Jan Hubicka <hubicka@ucw.cz> wrote:

> ... we initialize mode to be non-VOIDmode only if the field is not bitfield. I missed
> the flag while looking at the dump.  Indeed the DECL_MODE if FIELD_DECL is SImode,
> but it is ignored.

> Hmm, it seems that for CALL_EXPR the register is supposed to be non-BLKmode
> already.  So I guess only what we need to do is to consider bifields when 
> TEMP is blk mode and then we want to convert? what about this?

How about using in store_bit_field the same logic you added to
store_expr_with_bounds to get input MEMs to have a compatible mode?
This patch was regstrapped on i686-linux-gnu and x86_64-linux-gnu.  Ok
to install?


support BLKmode inputs for store_bit_field

From: Alexandre Oliva <aoliva@redhat.com>

Revision 228586 changed useless_type_conversion_p and added mode
changes for MEM:BLKmode inputs in store_expr_with_bounds, but it
missed store_bit_field.  This caused ada/rts/s-regpat.ads to fail
compilation on x86_64-linux-gnu.

for  gcc/ChangeLog

	* expmed.c (store_bit_field_1): Adjust mode of BLKmode inputs.
---
 gcc/expmed.c |    8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Richard Biener Oct. 13, 2015, 8:39 a.m. UTC | #1
On Tue, 13 Oct 2015, Alexandre Oliva wrote:

> On Oct  9, 2015, Jan Hubicka <hubicka@ucw.cz> wrote:
> 
> > ... we initialize mode to be non-VOIDmode only if the field is not bitfield. I missed
> > the flag while looking at the dump.  Indeed the DECL_MODE if FIELD_DECL is SImode,
> > but it is ignored.
> 
> > Hmm, it seems that for CALL_EXPR the register is supposed to be non-BLKmode
> > already.  So I guess only what we need to do is to consider bifields when 
> > TEMP is blk mode and then we want to convert? what about this?
> 
> How about using in store_bit_field the same logic you added to
> store_expr_with_bounds to get input MEMs to have a compatible mode?
> This patch was regstrapped on i686-linux-gnu and x86_64-linux-gnu.  Ok
> to install?

Ok.

Thanks,
Richard.

> support BLKmode inputs for store_bit_field
> 
> From: Alexandre Oliva <aoliva@redhat.com>
> 
> Revision 228586 changed useless_type_conversion_p and added mode
> changes for MEM:BLKmode inputs in store_expr_with_bounds, but it
> missed store_bit_field.  This caused ada/rts/s-regpat.ads to fail
> compilation on x86_64-linux-gnu.
> 
> for  gcc/ChangeLog
> 
> 	* expmed.c (store_bit_field_1): Adjust mode of BLKmode inputs.
> ---
>  gcc/expmed.c |    8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/gcc/expmed.c b/gcc/expmed.c
> index 93cf508..69ea511 100644
> --- a/gcc/expmed.c
> +++ b/gcc/expmed.c
> @@ -757,6 +757,14 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
>        }
>    }
>  
> +  /* We allow move between structures of same size but different mode.
> +     If source is in memory and the mode differs, simply change the memory.  */
> +  if (GET_MODE (value) == BLKmode && GET_MODE (op0) != BLKmode)
> +    {
> +      gcc_assert (MEM_P (value));
> +      value = adjust_address_nv (value, GET_MODE (op0), 0);
> +    }
> +
>    /* Storing an lsb-aligned field in a register
>       can be done with a movstrict instruction.  */
>  
> 
> 
>
Eric Botcazou Oct. 13, 2015, 9:20 a.m. UTC | #2
> How about using in store_bit_field the same logic you added to
> store_expr_with_bounds to get input MEMs to have a compatible mode?
> This patch was regstrapped on i686-linux-gnu and x86_64-linux-gnu.  Ok
> to install?
> 
> 
> support BLKmode inputs for store_bit_field
> 
> From: Alexandre Oliva <aoliva@redhat.com>
> 
> Revision 228586 changed useless_type_conversion_p and added mode
> changes for MEM:BLKmode inputs in store_expr_with_bounds, but it
> missed store_bit_field.  This caused ada/rts/s-regpat.ads to fail
> compilation on x86_64-linux-gnu.

Thanks for fixing it.  Note that this is PR middle-end/67912.
Alexandre Oliva Oct. 13, 2015, 4:36 p.m. UTC | #3
On Oct 13, 2015, Eric Botcazou <ebotcazou@adacore.com> wrote:

> Note that this is PR middle-end/67912.

Thanks.  I added this piece of information to the ChangeLog entry, and
checked the patch in.
Jan Hubicka Oct. 14, 2015, 4:34 a.m. UTC | #4
> On Oct 13, 2015, Eric Botcazou <ebotcazou@adacore.com> wrote:
> 
> > Note that this is PR middle-end/67912.
> 
> Thanks.  I added this piece of information to the ChangeLog entry, and
> checked the patch in.
Thanks, Alexandre. That indeed looks better than my variant of the patch.
Does it also fix the IA-64 issue?

Honza
> 
> -- 
> Alexandre Oliva, freedom fighter    http://FSFLA.org/~lxoliva/
> You must be the change you wish to see in the world. -- Gandhi
> Be Free! -- http://FSFLA.org/   FSF Latin America board member
> Free Software Evangelist|Red Hat Brasil GNU Toolchain Engineer
Alexandre Oliva Oct. 14, 2015, 8:15 p.m. UTC | #5
On Oct 14, 2015, Jan Hubicka <hubicka@ucw.cz> wrote:

>> On Oct 13, 2015, Eric Botcazou <ebotcazou@adacore.com> wrote:
>> 
>> > Note that this is PR middle-end/67912.
>> 
>> Thanks.  I added this piece of information to the ChangeLog entry, and
>> checked the patch in.

> Thanks, Alexandre. That indeed looks better than my variant of the patch.
> Does it also fix the IA-64 issue?

I didn't know about the ia64 issue when I prepared the patch; I only
found the thread when the patch was fully tested.  I didn't test it on
that arch, but I'm hoping to hear from whoever reported the ia64 problem
that the patch fixed it too ;-)
diff mbox

Patch

diff --git a/gcc/expmed.c b/gcc/expmed.c
index 93cf508..69ea511 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -757,6 +757,14 @@  store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       }
   }
 
+  /* We allow move between structures of same size but different mode.
+     If source is in memory and the mode differs, simply change the memory.  */
+  if (GET_MODE (value) == BLKmode && GET_MODE (op0) != BLKmode)
+    {
+      gcc_assert (MEM_P (value));
+      value = adjust_address_nv (value, GET_MODE (op0), 0);
+    }
+
   /* Storing an lsb-aligned field in a register
      can be done with a movstrict instruction.  */