From patchwork Mon Apr 22 10:11:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Oliva X-Patchwork-Id: 1926145 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=adacore.com header.i=@adacore.com header.a=rsa-sha256 header.s=google header.b=ftRM7hhU; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VNLds2bsLz1yZS for ; Mon, 22 Apr 2024 20:12:15 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4BA3C384AB52 for ; Mon, 22 Apr 2024 10:12:13 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-io1-xd2e.google.com (mail-io1-xd2e.google.com [IPv6:2607:f8b0:4864:20::d2e]) by sourceware.org (Postfix) with ESMTPS id 65F7F3858D38 for ; Mon, 22 Apr 2024 10:11:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 65F7F3858D38 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=adacore.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=adacore.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 65F7F3858D38 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::d2e ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713780711; cv=none; b=t8qEK2HXhcuiiVN0uTEqErx5JPwaZMagxh4aCujwghmvSA7SiwSAsfG0ZuTEhBZkqax8xyz+ogxalT6Sn8oVCa0EooiP8ERzC6DcCRNKCk0WeaZekhktiMFglvhm15y7yeRJdp35n14SZItbK0BDR9Yr4S40ZcAyFDlnk/PjRPc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713780711; c=relaxed/simple; bh=dDy+frWn8fzU2sy+O4XUdZDZr7HEeFQgLi4JBPwE1H8=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=vAI+8VuUCS7E2Ej9FN4SQ6IPoDjWnIeEJKL0JaJjWWoWs03zDwftFXMbr/tnp8jnWxX4Pab+irQOuJyN9x0qP9DAg9POaBtK+KW8m6KOF5BJnJE+l/iwCBeXO61wcsAC5qFcPyOGcipKIggyuUMW1hBJTN6yGKjEjRAyPzQup6A= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-io1-xd2e.google.com with SMTP id ca18e2360f4ac-7d5e4097a9aso185191339f.3 for ; Mon, 22 Apr 2024 03:11:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1713780705; x=1714385505; darn=gcc.gnu.org; h=mime-version:user-agent:message-id:in-reply-to:date:references :organization:subject:cc:to:from:from:to:cc:subject:date:message-id :reply-to; bh=azSyVckvq84QmGNxttVQ7U4RpKp9PenPBazMX701mlE=; b=ftRM7hhU/2ll4WzB5RHB1xS1nLJcoQgz2hIDRi8pUgZcc3AhaxQ1HmOUPOGlGDvZWq e7ELJt2VkYBRcvkYMx8Txc7jxUOXYZyH8FoMu3ykXJluPUgpjfhwpy2UlqzpatNdLF0Y vHXaQwbWAE+N4RGevXjmBJt1urGDE9tm45aqJczpn9vGmLNYlMat2IT7pbDg5CruvMTE YbhpD6Ppm+K8RaoAGT/BGNUO0M00QxSYGvNO/t/SJKyZZoPBNsXPHBbbnV9lwqaqFpwW SjIX3jPBwk++OA4A8JHMop+PMCqkXEe6qZwcjBQVBO9GeQJmrsaR7FqVtUtsa1d0R+Ak dydw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713780705; x=1714385505; h=mime-version:user-agent:message-id:in-reply-to:date:references :organization:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=azSyVckvq84QmGNxttVQ7U4RpKp9PenPBazMX701mlE=; b=cjP+ZRGsd+ACfHz4Mmk8PZDncjekaUhprbzhlMQeT8OWoP9eZ6CpVNLzWtCZP3izYj WHwYh7ypB6ggC4/yJ+dU0p2e6rWeync9ME0mZM+UIX0NOaGvJDT5M/BqrYB4fmw2lAUo BorgQiRX+V6YyGi9AbIzvz8HF07IaTbmtW0eOrKkAEbfuLWfUDLDd4kyeTQaeaopRzTU VU65xs85TbhuBTlossVMPcvsg4FoOVbp8nY6qG59U6mDtSb3Yx/HM+ruboat2q71YRV5 yt3i2Bv06hKN4/IEz3O8f/fYxwzmemmM/fJpG7XJ3s7bUbDmx0Q5gRak/qxLfmblVKMf aqgQ== X-Forwarded-Encrypted: i=1; AJvYcCXV7ktCORttrbvpbKCePK4ZXLsvF6mITl1+z3Jmki5WV08XPMFi6EqstZn/T3fMCuXgOMGEiIT4rlyHbpbyuyHZ6Lksa5RVIA== X-Gm-Message-State: AOJu0YxroBHYlhVjN76spbatmObUrqy6y18HaCUMGwV+3Mi/UADfXXiT WlCF6zu8saYGpbf0gGMpZcLhREQv81cLdOVq3+BPSytqvHM77hQQkoH9L6daew== X-Google-Smtp-Source: AGHT+IFLe9H63KHnOHdds7smKWCyd7ayu6Ad1jQ4EVSuNXE88uhbvqG3O/TK3QQQCBrzwy7X9YI5sw== X-Received: by 2002:a05:6e02:16cb:b0:36a:2333:3665 with SMTP id 11-20020a056e0216cb00b0036a23333665mr13276752ilx.30.1713780705300; Mon, 22 Apr 2024 03:11:45 -0700 (PDT) Received: from free.home ([2804:7f1:218b:5e2:c43b:e0c4:71a:241b]) by smtp.gmail.com with ESMTPSA id g7-20020a632007000000b005e83b64021fsm7254268pgg.25.2024.04.22.03.11.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 03:11:44 -0700 (PDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 43MABUTp020955 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 22 Apr 2024 07:11:30 -0300 From: Alexandre Oliva To: Segher Boessenkool Cc: Rainer Orth , Mike Stump , David Edelsohn , Kewen Lin , gcc-patches@gcc.gnu.org Subject: [PATCH v2] [testsuite] [powerpc] adjust -m32 counts for fold-vec-extract* Organization: Free thinker, does not speak for AdaCore References: <0737fbfc-726c-ffca-5f36-d6b3f0decfec@linux.ibm.com> <20230525112200.GJ19790@gate.crashing.org> <20230525153332.GK19790@gate.crashing.org> Date: Mon, 22 Apr 2024 07:11:30 -0300 In-Reply-To: <20230525153332.GK19790@gate.crashing.org> (Segher Boessenkool's message of "Thu, 25 May 2023 10:33:32 -0500") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Ping?-ish https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619678.html It's that time of the year again. The good news is that this is the last patch in my ppc*-vxworks7* set ;-) On May 25, 2023, Segher Boessenkool wrote: > On Thu, May 25, 2023 at 10:55:37AM -0300, Alexandre Oliva wrote: >> I've actually identified the corresponding change to the >> lp64 tests, compared the effects of the codegen changes, and concluded >> the tests needed this changing for ilp32 to keep on testing for the same >> thing after code changes brought about by changes that AFAICT had been >> well understood when making the lp64 adjustments. >> /* -m32 target has an 'add' in place of one of the 'addi'. */ >> -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ >> -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ >> +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */ > Just {\madd} or more conservative {\maddi?\M} then? I've made these changes in the v2 below. Codegen changes caused add instruction count mismatches on ppc-*-linux-gnu and other 32-bit ppc targets. At some point the expected counts were adjusted for lp64, but ilp32 differences remained, and published test results confirm it. Regstrapped on x86_64-linux-gnu and ppc64el-linux-gnu. Also tested with gcc-13 on ppc64-vx7r2 and ppc-vx7r2. Ok to install? for gcc/testsuite/ChangeLog PR testsuite/101169 * gcc.target/powerpc/fold-vec-extract-double.p7.c: Adjust addi counts for ilp32. * gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise. --- .../powerpc/fold-vec-extract-double.p7.c | 5 ++--- .../gcc.target/powerpc/fold-vec-extract-float.p7.c | 5 ++--- .../gcc.target/powerpc/fold-vec-extract-float.p8.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-int.p7.c | 3 +-- .../gcc.target/powerpc/fold-vec-extract-int.p8.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-short.p7.c | 3 +-- .../gcc.target/powerpc/fold-vec-extract-short.p8.c | 2 +- 7 files changed, 9 insertions(+), 13 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c index 3cae644b90b71..e69d9253e2d28 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c @@ -13,12 +13,11 @@ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 target has an 'add' in place of one of the 'addi'. */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */ /* -m32 target has a rlwinm in place of a rldic . */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mlfdx\M|\mlfd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mlfdx?\M} 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c index 59a4979457dcb..9ff197a704906 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c @@ -12,13 +12,12 @@ /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 as an add in place of an addi. */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */ /* -m32 uses rlwinm in place of rldic */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ /* -m32 has lfs in place of lfsx */ -/* { dg-final { scan-assembler-times {\mlfsx\M|\mlfs\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mlfsx?\M} 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c index ce4e43c1fb462..cd80c5e1b19c6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c @@ -26,7 +26,7 @@ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c index 3729a1646e9c9..cc3c803b49cf6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c @@ -10,8 +10,7 @@ // P7 variables: li, addi, stxvw4x, lwa/lwz /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c index 152fbdd041bec..67db0306df92d 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c @@ -30,7 +30,7 @@ /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c index a495d9f3928fa..e16277df847bc 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c @@ -10,8 +10,7 @@ // P7 (be) constants: li, addi, stxvw4x, lha/lhz /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */ /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c index 9eabc5068d495..45a07d10ea96a 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c @@ -32,7 +32,7 @@ /* add and rlwinm instructions only on the variable tests. */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */