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Fri, 21 Jun 2024 00:57:55 -0700 (PDT) Received: from free.home ([2804:7f1:218a:b0f2:d3a0:9bb9:b44d:372a]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f9ebbc8dbcsm8191165ad.307.2024.06.21.00.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jun 2024 00:57:54 -0700 (PDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 45L7vXkQ151926 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Fri, 21 Jun 2024 04:57:33 -0300 From: Alexandre Oliva To: Christophe Lyon Cc: "Richard Earnshaw (lists)" , gcc-patches@gcc.gnu.org, Rainer Orth , Mike Stump , Nick Clifton , Ramana Radhakrishnan Subject: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281] Organization: Free thinker, does not speak for AdaCore References: <2cae44c9-e677-4c1b-acfb-ab408de28a57@arm.com> Date: Fri, 21 Jun 2024 04:57:33 -0300 In-Reply-To: (Christophe Lyon's message of "Thu, 20 Jun 2024 13:57:45 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org On Jun 20, 2024, Christophe Lyon wrote: > Maybe using > if ((unsigned)b[i] >= BITS) \ > would be clearer? Heh. Why make it simpler if we can make it unreadable, right? :-D Thanks, here's another version I've just retested on x-arm-eabi. Ok? I'm not sure how to credit your suggestion. It's not like you pretty much wrote the entire patch, as in Richard's case, but it's still a sizable chunk of this two-liner. Any preferences? The test was too optimistic, alas. We used to vectorize shifts involving 8-bit and 16-bit integral types by clamping the shift count at the highest in-range shift count, but that was not correct: such narrow shifts expect integral promotion, so larger shift counts should be accepted. (int16_t)32768 >> (int16_t)16 must yield 0, not 1 (as before the fix). Unfortunately, in the gimple model of vector units, such large shift counts wouldn't be well-defined, so we won't vectorize such shifts any more, unless we can tell they're in range or undefined. So the test that expected the incorrect clamping we no longer perform needs to be adjusted. Instead of nobbling the test, Richard Earnshaw suggested annotating the test with the expected ranges so as to enable the optimization. Co-Authored-By: Richard Earnshaw for gcc/testsuite/ChangeLog PR tree-optimization/113281 * gcc.target/arm/simd/mve-vshr.c: Add expected ranges. --- gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c index 8c7adef9ed8f1..03078de49c65e 100644 --- a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c @@ -9,6 +9,8 @@ void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ int i; \ for (i=0; i= (unsigned)(BITS)) \ + __builtin_unreachable(); \ dest[i] = a[i] OP b[i]; \ } \ }