From patchwork Thu Feb 9 09:48:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Schwab X-Patchwork-Id: 1739863 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=pEM+2rIJ; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PCBry3yBHz23jH for ; Thu, 9 Feb 2023 20:48:49 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D9ED53858C30 for ; Thu, 9 Feb 2023 09:48:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D9ED53858C30 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675936126; bh=Od7e6icPZnDAGE8NeX7Aarj/m0jPr3mMURxV9Lvs1zw=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=pEM+2rIJbwZFoXry0BhTESPzXDia5Aa/KBzK4U6Urx3blokEp5AD3TStrMi3R5d08 WCKrJ7EU5XrfixYB8clgMOVq/ZKO12Fh++4vhcaPQdYKyFXs7my0q7lbP842uBig2R UABSSgSMUOBNEiRI7NMIqCDu5mzc4WF21f7UJMl8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtp-out2.suse.de (smtp-out2.suse.de [IPv6:2001:67c:2178:6::1d]) by sourceware.org (Postfix) with ESMTPS id B5DA93858C50 for ; Thu, 9 Feb 2023 09:48:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B5DA93858C50 Received: from relay2.suse.de (relay2.suse.de [149.44.160.134]) by smtp-out2.suse.de (Postfix) with ESMTP id AB17D5C650; Thu, 9 Feb 2023 09:48:25 +0000 (UTC) Received: from hawking.suse.de (unknown [10.168.4.11]) by relay2.suse.de (Postfix) with ESMTP id 8DF682C15A; Thu, 9 Feb 2023 09:48:25 +0000 (UTC) Received: by hawking.suse.de (Postfix, from userid 17005) id 399D9441A10; Thu, 9 Feb 2023 10:48:25 +0100 (CET) To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, andrew@sifive.com, jim.wilson.gcc@gmail.com Subject: [PATCH] testsuite: adjust patterns in RISC-V tests to skip unwind table directives X-Yow: It's today's SPECIAL! Date: Thu, 09 Feb 2023 10:48:25 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.2 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-9.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andreas Schwab via Gcc-patches From: Andreas Schwab Reply-To: Andreas Schwab Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" PR target/108723 * gcc.target/riscv/shorten-memrefs-1.c: Adjust patterns to skip over cfi directives. * gcc.target/riscv/shorten-memrefs-2.c: Likewise. * gcc.target/riscv/shorten-memrefs-3.c: Likewise. * gcc.target/riscv/shorten-memrefs-4.c: Likewise. * gcc.target/riscv/shorten-memrefs-5.c: Likewise. * gcc.target/riscv/shorten-memrefs-6.c: Likewise. * gcc.target/riscv/shorten-memrefs-8.c: Likewise. Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt --- gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c | 4 ++-- gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c | 8 ++++---- gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c | 2 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c | 4 ++-- gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c | 8 ++++---- gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c | 2 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c | 4 ++-- 7 files changed, 16 insertions(+), 16 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c index f0222f46eff..cce7c80f6c1 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c @@ -23,5 +23,5 @@ store2z (long long *array) array[203] = 0; } -/* { dg-final { scan-assembler-not "store1z:\n\taddi" } } */ -/* { dg-final { scan-assembler-not "store2z:\n\taddi" } } */ +/* { dg-final { scan-assembler-not "store1z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */ +/* { dg-final { scan-assembler-not "store2z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c index ec39104fd88..a9ddb797d06 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c @@ -44,9 +44,9 @@ load2r (long long *array) return a; } -/* { dg-final { scan-assembler "store1a:\n\taddi" } } */ +/* { dg-final { scan-assembler "store1a:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */ /* The sd insns in store2a are not rewritten because shorten_memrefs currently only optimizes lw and sw. -/* { dg-final { scan-assembler "store2a:\n\taddi" { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler "load1r:\n\taddi" } } */ -/* { dg-final { scan-assembler "load2r:\n\taddi" } } */ +/* { dg-final { scan-assembler "store2a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler "load1r:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */ +/* { dg-final { scan-assembler "load2r:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c index 50316284832..3d561124b81 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c @@ -36,5 +36,5 @@ load2a (long long a0, long long a1, long long a2, long long a3, long long a4, return sub2 (a0, a1, a2, a3, a4, 0, a); } -/* { dg-final { scan-assembler-not "load1a:\n\taddi" { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not "load1a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */ /* { dg-final { scan-assembler-not "load2a:\n.*addi\[ \t\]*\[at\]\[0-9\],\[at\]\[0-9\],\[0-9\]*" { xfail riscv*-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c index d985512e2b3..26decf085fb 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c @@ -23,5 +23,5 @@ store2z (long long *array) array[203] = 0; } -/* { dg-final { scan-assembler-not "store1z:\n\taddi" } } */ -/* { dg-final { scan-assembler-not "store2z:\n\taddi" } } */ +/* { dg-final { scan-assembler-not "store1z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */ +/* { dg-final { scan-assembler-not "store2z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c index 9217922c10d..11e858ed6da 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c @@ -44,11 +44,11 @@ load2r (long long *array) return a; } -/* { dg-final { scan-assembler "store1a:\n\taddi" } } */ +/* { dg-final { scan-assembler "store1a:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */ /* The sd insns in store2a are not rewritten because shorten_memrefs currently only optimizes lw and sw. -/* { dg-final { scan-assembler "store2a:\n\taddi" { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler "load1r:\n\taddi" } } */ +/* { dg-final { scan-assembler "store2a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler "load1r:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */ /* The ld insns in load2r are not rewritten because shorten_memrefs currently only optimizes lw and sw. -/* { dg-final { scan-assembler "load2r:\n\taddi" { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler "load2r:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c index c36af6d6a5d..b6539b76aaf 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c @@ -36,5 +36,5 @@ load2a (long long a0, long long a1, long long a2, long long a3, long long a4, return sub2 (a0, a1, a2, a3, a4, 0, a); } -/* { dg-final { scan-assembler-not "load1a:\n\taddi" { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not "load1a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */ /* { dg-final { scan-assembler-not "load2a:\n.*addi\[ \t\]*\[at\]\[0-9\],\[at\]\[0-9\],\[0-9\]*" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c index 6dfc015cf3a..3ff6956b33e 100644 --- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c +++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c @@ -23,6 +23,6 @@ load (char *p) return a; } -/* { dg-final { scan-assembler "store:\n\taddi\ta\[0-7\],a\[0-7\],1" } } */ -/* { dg-final { scan-assembler "load:\n\taddi\ta\[0-7\],a\[0-7\],1" } } */ +/* { dg-final { scan-assembler "store:\n(\t?\\.\[^\n\]*\n)*\taddi\ta\[0-7\],a\[0-7\],1" } } */ +/* { dg-final { scan-assembler "load:\n(\t?\\.\[^\n\]*\n)*\taddi\ta\[0-7\],a\[0-7\],1" } } */