| Message ID | mvm4j6g2enz.fsf@suse.de |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: Fix duplicate assmbler label in @tlsdesc<mode> insn | expand |
LGTM, thanks :) Andreas Schwab <schwab@suse.de> 於 2024年9月16日 週一 10:21 寫道： > Use %= instead of maintaining a sequence number manually, so that it > doesn't result in a duplicate assembler label when the insn is duplicated. > > PR target/116693 > * config/riscv/riscv.cc (riscv_legitimize_tls_address): Don't pass > seqno to gen_tlsdesc and remove it. > * config/riscv/riscv.md (@tlsdesc<mode>): Remove operand 1. Use > %= instead of %1 in template. > --- > gcc/config/riscv/riscv.cc | 4 +--- > gcc/config/riscv/riscv.md | 15 +++++++-------- > 2 files changed, 8 insertions(+), 11 deletions(-) > > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 6efe14ff199..fbf2da71e10 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -2779,14 +2779,12 @@ riscv_legitimize_tls_address (rtx loc) > case TLS_MODEL_GLOBAL_DYNAMIC: > if (TARGET_TLSDESC) > { > - static unsigned seqno; > tp = gen_rtx_REG (Pmode, THREAD_POINTER_REGNUM); > a0 = gen_rtx_REG (Pmode, GP_ARG_FIRST); > dest = gen_reg_rtx (Pmode); > > - emit_insn (gen_tlsdesc (Pmode, loc, GEN_INT (seqno))); > + emit_insn (gen_tlsdesc (Pmode, loc)); > emit_insn (gen_add3_insn (dest, a0, tp)); > - seqno++; > } > else > { > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > index 9f94b5aa023..fd1cbebc435 100644 > --- a/gcc/config/riscv/riscv.md > +++ b/gcc/config/riscv/riscv.md > @@ -2327,17 +2327,16 @@ > > (define_insn "@tlsdesc<mode>" > [(set (reg:P A0_REGNUM) > - (unspec:P > - [(match_operand:P 0 "symbolic_operand" "") > - (match_operand:P 1 "const_int_operand")] > - UNSPEC_TLSDESC)) > + (unspec:P > + [(match_operand:P 0 "symbolic_operand" "")] > + UNSPEC_TLSDESC)) > (clobber (reg:P T0_REGNUM))] > "TARGET_TLSDESC" > { > - return ".LT%1: auipc\ta0,%%tlsdesc_hi(%0)\;" > - "<load>\tt0,%%tlsdesc_load_lo(.LT%1)(a0)\;" > - "addi\ta0,a0,%%tlsdesc_add_lo(.LT%1)\;" > - "jalr\tt0,t0,%%tlsdesc_call(.LT%1)"; > + return ".LT%=: auipc\ta0,%%tlsdesc_hi(%0)\;" > + "<load>\tt0,%%tlsdesc_load_lo(.LT%=)(a0)\;" > + "addi\ta0,a0,%%tlsdesc_add_lo(.LT%=)\;" > + "jalr\tt0,t0,%%tlsdesc_call(.LT%=)"; > } > [(set_attr "type" "multi") > (set_attr "length" "16") > -- > 2.46.1 > > > -- > Andreas Schwab, SUSE Labs, schwab@suse.de > GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 > "And now for something completely different." >
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 6efe14ff199..fbf2da71e10 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2779,14 +2779,12 @@ riscv_legitimize_tls_address (rtx loc) case TLS_MODEL_GLOBAL_DYNAMIC: if (TARGET_TLSDESC) { - static unsigned seqno; tp = gen_rtx_REG (Pmode, THREAD_POINTER_REGNUM); a0 = gen_rtx_REG (Pmode, GP_ARG_FIRST); dest = gen_reg_rtx (Pmode); - emit_insn (gen_tlsdesc (Pmode, loc, GEN_INT (seqno))); + emit_insn (gen_tlsdesc (Pmode, loc)); emit_insn (gen_add3_insn (dest, a0, tp)); - seqno++; } else { diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 9f94b5aa023..fd1cbebc435 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2327,17 +2327,16 @@ (define_insn "@tlsdesc<mode>" [(set (reg:P A0_REGNUM) - (unspec:P - [(match_operand:P 0 "symbolic_operand" "") - (match_operand:P 1 "const_int_operand")] - UNSPEC_TLSDESC)) + (unspec:P + [(match_operand:P 0 "symbolic_operand" "")] + UNSPEC_TLSDESC)) (clobber (reg:P T0_REGNUM))] "TARGET_TLSDESC" { - return ".LT%1: auipc\ta0,%%tlsdesc_hi(%0)\;" - "<load>\tt0,%%tlsdesc_load_lo(.LT%1)(a0)\;" - "addi\ta0,a0,%%tlsdesc_add_lo(.LT%1)\;" - "jalr\tt0,t0,%%tlsdesc_call(.LT%1)"; + return ".LT%=: auipc\ta0,%%tlsdesc_hi(%0)\;" + "<load>\tt0,%%tlsdesc_load_lo(.LT%=)(a0)\;" + "addi\ta0,a0,%%tlsdesc_add_lo(.LT%=)\;" + "jalr\tt0,t0,%%tlsdesc_call(.LT%=)"; } [(set_attr "type" "multi") (set_attr "length" "16")