diff mbox series

[pushed] aarch64: Restore generation of SVE UQDEC instructions

Message ID mptzga6n9ce.fsf@arm.com
State New
Headers show
Series [pushed] aarch64: Restore generation of SVE UQDEC instructions | expand

Commit Message

Richard Sandiford Jan. 25, 2023, 11:26 a.m. UTC 
The addition of TARGET_CSSC meant that we wouldn't generate SVE
UQDEC instructions unless +cssc was also enabled.

Fixes:
- gcc.target/aarch64/sve/slp_4.c
- gcc.target/aarch64/sve/slp_10.c
- gcc.target/aarch64/sve/while_4.c

Tested on aarch64-linux-gnu & pushed.

Richard


gcc/
	* config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
	tests.
---
 gcc/config/aarch64/aarch64.md | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index e4d7587aac7..0b326d497b4 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4457,8 +4457,9 @@  (define_expand "umax<mode>3"
   {
     if (aarch64_sve_cnt_immediate (operands[1], <MODE>mode))
       std::swap (operands[1], operands[2]);
-    else if (!aarch64_sve_cnt_immediate (operands[2], <MODE>mode)
-	     && TARGET_CSSC)
+    else if (aarch64_sve_cnt_immediate (operands[2], <MODE>mode))
+      ;
+    else if (TARGET_CSSC)
       {
 	if (aarch64_uminmax_immediate (operands[1], <MODE>mode))
 	  std::swap (operands[1], operands[2]);