From patchwork Fri Mar 26 16:18:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1458881 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=tggyyfjj; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4F6RxF1TjXz9sR4 for ; Sat, 27 Mar 2021 03:18:57 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 360C3386EC4F; Fri, 26 Mar 2021 16:18:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 360C3386EC4F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1616775533; bh=oJl/+FAaIRQ3OP3N40I32sB2pYDNUaG6dyMfyXyPtEI=; h=To:Subject:References:Date:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=tggyyfjjwDPYPzdA6GiSGhiaYYZbXusjOmpOLf1MCO/c3g6SuGRXYMHlOYm8BKK4h 4QjynY4tmjKUIznQmxbeosGW+TtWwppcKmr1GV1+hC9HZD88ujvi2M78wfLCF2XGHL kEch8gE/qbp4yp8lrmo1gZyDdW2nX8vIVIS0agyo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 095D8386EC42 for ; Fri, 26 Mar 2021 16:18:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 095D8386EC42 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BF78F1476 for ; Fri, 26 Mar 2021 09:18:49 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 678123F792 for ; Fri, 26 Mar 2021 09:18:49 -0700 (PDT) To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [PATCH 13/13] aarch64: Add costs for LD[34] and ST[34] postincrements References: Date: Fri, 26 Mar 2021 16:18:48 +0000 In-Reply-To: (Richard Sandiford's message of "Fri, 26 Mar 2021 16:12:42 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Gcc-patches From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Most postincrements are cheap on Neoverse V1, but it's generally better to avoid them on LD[34] and ST[34] instructions. This patch adds separate address costs fields for these cases. Other CPUs continue to use the same costs for all postincrements. gcc/ * config/aarch64/aarch64-protos.h (cpu_addrcost_table::post_modify_ld3_st3): New member variable. (cpu_addrcost_table::post_modify_ld4_st4): Likewise. * config/aarch64/aarch64.c (generic_addrcost_table): Update accordingly, using the same costs as for post_modify. (exynosm1_addrcost_table, xgene1_addrcost_table): Likewise. (thunderx2t99_addrcost_table, thunderx3t110_addrcost_table): (tsv110_addrcost_table, qdf24xx_addrcost_table): Likewise. (a64fx_addrcost_table): Likewise. (neoversev1_addrcost_table): New. (neoversev1_tunings): Use neoversev1_addrcost_table. (aarch64_address_cost): Use the new post_modify costs for CImode and XImode. --- gcc/config/aarch64/aarch64-protos.h | 2 ++ gcc/config/aarch64/aarch64.c | 45 +++++++++++++++++++++++++++-- 2 files changed, 45 insertions(+), 2 deletions(-) diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index ca1ed9e8758..d5d5417370e 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -177,6 +177,8 @@ struct cpu_addrcost_table const struct scale_addr_mode_cost addr_scale_costs; const int pre_modify; const int post_modify; + const int post_modify_ld3_st3; + const int post_modify_ld4_st4; const int register_offset; const int register_sextend; const int register_zextend; diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 6d961bea5dc..a573850b3fd 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -364,6 +364,8 @@ static const struct cpu_addrcost_table generic_addrcost_table = }, 0, /* pre_modify */ 0, /* post_modify */ + 0, /* post_modify_ld3_st3 */ + 0, /* post_modify_ld4_st4 */ 0, /* register_offset */ 0, /* register_sextend */ 0, /* register_zextend */ @@ -380,6 +382,8 @@ static const struct cpu_addrcost_table exynosm1_addrcost_table = }, 0, /* pre_modify */ 0, /* post_modify */ + 0, /* post_modify_ld3_st3 */ + 0, /* post_modify_ld4_st4 */ 1, /* register_offset */ 1, /* register_sextend */ 2, /* register_zextend */ @@ -396,6 +400,8 @@ static const struct cpu_addrcost_table xgene1_addrcost_table = }, 1, /* pre_modify */ 1, /* post_modify */ + 1, /* post_modify_ld3_st3 */ + 1, /* post_modify_ld4_st4 */ 0, /* register_offset */ 1, /* register_sextend */ 1, /* register_zextend */ @@ -412,6 +418,8 @@ static const struct cpu_addrcost_table thunderx2t99_addrcost_table = }, 0, /* pre_modify */ 0, /* post_modify */ + 0, /* post_modify_ld3_st3 */ + 0, /* post_modify_ld4_st4 */ 2, /* register_offset */ 3, /* register_sextend */ 3, /* register_zextend */ @@ -428,6 +436,8 @@ static const struct cpu_addrcost_table thunderx3t110_addrcost_table = }, 0, /* pre_modify */ 0, /* post_modify */ + 0, /* post_modify_ld3_st3 */ + 0, /* post_modify_ld4_st4 */ 2, /* register_offset */ 3, /* register_sextend */ 3, /* register_zextend */ @@ -444,6 +454,8 @@ static const struct cpu_addrcost_table tsv110_addrcost_table = }, 0, /* pre_modify */ 0, /* post_modify */ + 0, /* post_modify_ld3_st3 */ + 0, /* post_modify_ld4_st4 */ 0, /* register_offset */ 1, /* register_sextend */ 1, /* register_zextend */ @@ -460,6 +472,8 @@ static const struct cpu_addrcost_table qdf24xx_addrcost_table = }, 1, /* pre_modify */ 1, /* post_modify */ + 1, /* post_modify_ld3_st3 */ + 1, /* post_modify_ld4_st4 */ 3, /* register_offset */ 3, /* register_sextend */ 3, /* register_zextend */ @@ -476,12 +490,32 @@ static const struct cpu_addrcost_table a64fx_addrcost_table = }, 0, /* pre_modify */ 0, /* post_modify */ + 0, /* post_modify_ld3_st3 */ + 0, /* post_modify_ld4_st4 */ 2, /* register_offset */ 3, /* register_sextend */ 3, /* register_zextend */ 0, /* imm_offset */ }; +static const struct cpu_addrcost_table neoversev1_addrcost_table = +{ + { + 1, /* hi */ + 0, /* si */ + 0, /* di */ + 1, /* ti */ + }, + 0, /* pre_modify */ + 0, /* post_modify */ + 3, /* post_modify_ld3_st3 */ + 3, /* post_modify_ld4_st4 */ + 0, /* register_offset */ + 0, /* register_sextend */ + 0, /* register_zextend */ + 0 /* imm_offset */ +}; + static const struct cpu_regmove_cost generic_regmove_cost = { 1, /* GP2GP */ @@ -1777,7 +1811,7 @@ static const struct cpu_vector_cost neoversev1_vector_cost = static const struct tune_params neoversev1_tunings = { &cortexa76_extra_costs, - &generic_addrcost_table, + &neoversev1_addrcost_table, &generic_regmove_cost, &neoversev1_vector_cost, &generic_branch_cost, @@ -12077,7 +12111,14 @@ aarch64_address_cost (rtx x, if (c == PRE_INC || c == PRE_DEC || c == PRE_MODIFY) cost += addr_cost->pre_modify; else if (c == POST_INC || c == POST_DEC || c == POST_MODIFY) - cost += addr_cost->post_modify; + { + if (mode == CImode) + cost += addr_cost->post_modify_ld3_st3; + else if (mode == XImode) + cost += addr_cost->post_modify_ld4_st4; + else + cost += addr_cost->post_modify; + } else gcc_unreachable ();