From patchwork Thu Oct 20 09:39:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1692320 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=u633TRxo; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MtN0P7187z23jk for ; Thu, 20 Oct 2022 20:41:39 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F375138315B1 for ; Thu, 20 Oct 2022 09:41:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F375138315B1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1666258891; bh=aVfZuKfv9FYo8A7ByeVKg75Zx8hSXIDymHGB1j8mx0Y=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=u633TRxo3jEMf8K4P5/aL70CX2UFATby4oeaXBnttbSMWFZDcnvnk1cXJ/gHorHt7 ZFGlvR5xAdM2g5I9HqmcKxlKpp1wMLZ6erfp2dTfx0HnFNTrH71oq5fQHRo3ZFCeNW OBmfLNpYPpOKxGN3lIK7gxe8yj6kp2Pcx319sMBU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 6207E3831D97 for ; Thu, 20 Oct 2022 09:39:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6207E3831D97 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4BD8BD6E for ; Thu, 20 Oct 2022 02:39:52 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AE7BE3F792 for ; Thu, 20 Oct 2022 02:39:45 -0700 (PDT) To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [pushed] aarch64: Fix matching of BRKNS Date: Thu, 20 Oct 2022 10:39:44 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-43.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Gcc-patches From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Unlike other flag-setting SVE instructions, BRKNS sets the flags based on an all-true governing predicate, rather than the GP operand. Tested on aarch64-linux-gnu & pushed to trunk so far. I'll backport to release branches soon. Richard gcc/ * config/aarch64/iterators.md (SVE_BRKP): New iterator. * config/aarch64/aarch64-sve.md (*aarch64_brkn_cc): New pattern. (*aarch64_brkn_ptest): Likewise. (*aarch64_brk_cc): Restrict to SVE_BRKP. (*aarch64_brk_ptest): Likewise. gcc/testsuite/ * gcc.target/aarch64/sve/acle/general/brkn_1.c: Expect separate PTEST instructions. * gcc.target/aarch64/sve/acle/general/brkn_2.c: New test. --- gcc/config/aarch64/aarch64-sve.md | 70 ++++++++++++++++--- gcc/config/aarch64/iterators.md | 2 + .../aarch64/sve/acle/general/brkn_1.c | 5 +- .../aarch64/sve/acle/general/brkn_2.c | 23 ++++++ 4 files changed, 90 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index e08bee197d8..e2bb80268e5 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -9677,7 +9677,61 @@ (define_insn "@aarch64_brk" "brk\t%0.b, %1/z, %2.b, %.b" ) -;; Same, but also producing a flags result. +;; BRKN, producing both a predicate and a flags result. Unlike other +;; flag-setting instructions, these flags are always set wrt a ptrue. +(define_insn_and_rewrite "*aarch64_brkn_cc" + [(set (reg:CC_NZC CC_REGNUM) + (unspec:CC_NZC + [(match_operand:VNx16BI 4) + (match_operand:VNx16BI 5) + (const_int SVE_KNOWN_PTRUE) + (unspec:VNx16BI + [(match_operand:VNx16BI 1 "register_operand" "Upa") + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "register_operand" "0")] + UNSPEC_BRKN)] + UNSPEC_PTEST)) + (set (match_operand:VNx16BI 0 "register_operand" "=Upa") + (unspec:VNx16BI + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BRKN))] + "TARGET_SVE" + "brkns\t%0.b, %1/z, %2.b, %0.b" + "&& (operands[4] != CONST0_RTX (VNx16BImode) + || operands[5] != CONST0_RTX (VNx16BImode))" + { + operands[4] = CONST0_RTX (VNx16BImode); + operands[5] = CONST0_RTX (VNx16BImode); + } +) + +;; Same, but with only the flags result being interesting. +(define_insn_and_rewrite "*aarch64_brkn_ptest" + [(set (reg:CC_NZC CC_REGNUM) + (unspec:CC_NZC + [(match_operand:VNx16BI 4) + (match_operand:VNx16BI 5) + (const_int SVE_KNOWN_PTRUE) + (unspec:VNx16BI + [(match_operand:VNx16BI 1 "register_operand" "Upa") + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "register_operand" "0")] + UNSPEC_BRKN)] + UNSPEC_PTEST)) + (clobber (match_scratch:VNx16BI 0 "=Upa"))] + "TARGET_SVE" + "brkns\t%0.b, %1/z, %2.b, %0.b" + "&& (operands[4] != CONST0_RTX (VNx16BImode) + || operands[5] != CONST0_RTX (VNx16BImode))" + { + operands[4] = CONST0_RTX (VNx16BImode); + operands[5] = CONST0_RTX (VNx16BImode); + } +) + +;; BRKPA and BRKPB, producing both a predicate and a flags result. (define_insn "*aarch64_brk_cc" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC @@ -9687,17 +9741,17 @@ (define_insn "*aarch64_brk_cc" (unspec:VNx16BI [(match_dup 1) (match_operand:VNx16BI 2 "register_operand" "Upa") - (match_operand:VNx16BI 3 "register_operand" "")] - SVE_BRK_BINARY)] + (match_operand:VNx16BI 3 "register_operand" "Upa")] + SVE_BRKP)] UNSPEC_PTEST)) (set (match_operand:VNx16BI 0 "register_operand" "=Upa") (unspec:VNx16BI [(match_dup 1) (match_dup 2) (match_dup 3)] - SVE_BRK_BINARY))] + SVE_BRKP))] "TARGET_SVE" - "brks\t%0.b, %1/z, %2.b, %.b" + "brks\t%0.b, %1/z, %2.b, %3.b" ) ;; Same, but with only the flags result being interesting. @@ -9710,12 +9764,12 @@ (define_insn "*aarch64_brk_ptest" (unspec:VNx16BI [(match_dup 1) (match_operand:VNx16BI 2 "register_operand" "Upa") - (match_operand:VNx16BI 3 "register_operand" "")] - SVE_BRK_BINARY)] + (match_operand:VNx16BI 3 "register_operand" "Upa")] + SVE_BRKP)] UNSPEC_PTEST)) (clobber (match_scratch:VNx16BI 0 "=Upa"))] "TARGET_SVE" - "brks\t%0.b, %1/z, %2.b, %.b" + "brks\t%0.b, %1/z, %2.b, %3.b" ) ;; ------------------------------------------------------------------------- diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 9354dbec866..a8ad4e5ff21 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -3138,6 +3138,8 @@ (define_int_iterator FRINTNZX [UNSPEC_FRINT32Z UNSPEC_FRINT32X (define_int_iterator SVE_BRK_UNARY [UNSPEC_BRKA UNSPEC_BRKB]) +(define_int_iterator SVE_BRKP [UNSPEC_BRKPA UNSPEC_BRKPB]) + (define_int_iterator SVE_BRK_BINARY [UNSPEC_BRKN UNSPEC_BRKPA UNSPEC_BRKPB]) (define_int_iterator SVE_PITER [UNSPEC_PFIRST UNSPEC_PNEXT]) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c index 7fd9318c13f..c548810f169 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c @@ -18,5 +18,6 @@ test2 (svbool_t pg, svbool_t x, svbool_t y, int *any) return svptest_any (pg, res); } -/* { dg-final { scan-assembler-times {\tbrkns\t} 2 } } */ -/* { dg-final { scan-assembler-not {\tbrkn\t} } } */ +/* { dg-final { scan-assembler-times {\tbrkn\t} 2 } } */ +/* { dg-final { scan-assembler-times {\tptest\t} 2 } } */ +/* { dg-final { scan-assembler-not {\tbrkns\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c new file mode 100644 index 00000000000..74b6927410a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include + +void +test1 (svbool_t pg, svbool_t x, svbool_t y, int *any, svbool_t *ptr) +{ + svbool_t res = svbrkn_z (pg, x, y); + *any = svptest_any (svptrue_b8 (), res); + *ptr = res; +} + +int +test2 (svbool_t pg, svbool_t x, svbool_t y, int *any) +{ + svbool_t res = svbrkn_z (pg, x, y); + return svptest_any (svptrue_b8 (), res); +} + +/* { dg-final { scan-assembler-times {\tbrkns\t} 2 } } */ +/* { dg-final { scan-assembler-not {\tbrkn\t} } } */ +/* { dg-final { scan-assembler-not {\tptest\t} } } */