From patchwork Tue Sep 13 08:30:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1677174 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=rxNq4WfC; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MRc9W1Fd4z1yhR for ; Tue, 13 Sep 2022 18:30:38 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A1892385AE42 for ; Tue, 13 Sep 2022 08:30:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A1892385AE42 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1663057832; bh=vRK32uHukaR9Qava9b4yt75RAUTRp4j8C4eHRjcGkYs=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=rxNq4WfCE/xKdYk3lLCAKz/Ja/z6HZjPRF/kDrbuse/qLs7yy+EVnQDEO3Whgb+hF lnDWmka0kyLfeXc8lDUdcWsmVWd7f5wA50eyaM0TxOMS9VIk2z2ex1FViO7sXcolJo hDPdu6qW8wF1Bxy6xx7464lkSzSdEeW9KzCyTLh8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 14D41385841D for ; Tue, 13 Sep 2022 08:30:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 14D41385841D Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 15EA0D6E for ; Tue, 13 Sep 2022 01:30:14 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 509C03F73B for ; Tue, 13 Sep 2022 01:30:07 -0700 (PDT) To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [pushed] aarch64: Disassociate ls64 from simd Date: Tue, 13 Sep 2022 09:30:06 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-48.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Gcc-patches From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" The ls64-related move expanders and splits required TARGET_SIMD. That isn't necessary, since the 64-byte values are stored entirely in GPRs. (The associated define_insn was already correct.) I wondered about moving the patterns to aarch64.md, but it wasn't clear-cut. Tested on aarch64-linux-gnu & pushed. Richard gcc/ * config/aarch64/aarch64-simd.md (movv8di): Remove TARGET_SIMD condition. Likewise for the related define_split. Tweak formatting. gcc/testsuite/ * gcc.target/aarch64/acle/ls64_asm_2.c: New test. --- gcc/config/aarch64/aarch64-simd.md | 18 +++++++++--------- .../gcc.target/aarch64/acle/ls64_asm_2.c | 9 +++++++++ 2 files changed, 18 insertions(+), 9 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 587a45d7772..d4662c76a58 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -7087,7 +7087,7 @@ (define_expand "mov" (define_expand "movv8di" [(set (match_operand:V8DI 0 "nonimmediate_operand") (match_operand:V8DI 1 "general_operand"))] - "TARGET_SIMD" + "" { if (can_create_pseudo_p () && MEM_P (operands[0])) operands[1] = force_reg (V8DImode, operands[1]); @@ -7479,7 +7479,7 @@ (define_split (define_split [(set (match_operand:V8DI 0 "nonimmediate_operand") (match_operand:V8DI 1 "general_operand"))] - "TARGET_SIMD && reload_completed" + "reload_completed" [(const_int 0)] { if (register_operand (operands[0], V8DImode) @@ -7489,15 +7489,15 @@ (define_split DONE; } else if ((register_operand (operands[0], V8DImode) - && memory_operand (operands[1], V8DImode)) - || (memory_operand (operands[0], V8DImode) - && register_operand (operands[1], V8DImode))) + && memory_operand (operands[1], V8DImode)) + || (memory_operand (operands[0], V8DImode) + && register_operand (operands[1], V8DImode))) { for (int offset = 0; offset < 64; offset += 16) - emit_move_insn (simplify_gen_subreg (TImode, operands[0], - V8DImode, offset), - simplify_gen_subreg (TImode, operands[1], - V8DImode, offset)); + emit_move_insn (simplify_gen_subreg (TImode, operands[0], + V8DImode, offset), + simplify_gen_subreg (TImode, operands[1], + V8DImode, offset)); DONE; } else diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c new file mode 100644 index 00000000000..1b4277180a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +#pragma GCC target "+ls64+nofp" + +#include "ls64_asm.c" + +/* { dg-final { scan-assembler-times {\tldp\t} 12 } } */ +/* { dg-final { scan-assembler-times {\tstp\t} 4 } } */