Message ID | mptbkzg6kle.fsf@arm.com |
---|---|
State | New |
Headers | show |
Series | aarch64: Fix regression in vec_init code quality | expand |
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 9529bdb4997..872a3d78269 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -1378,7 +1378,7 @@ (define_insn "vec_shr_<mode>" (define_expand "vec_set<mode>" [(match_operand:VALL_F16 0 "register_operand") - (match_operand:<VEL> 1 "register_operand") + (match_operand:<VEL> 1 "aarch64_simd_nonimmediate_operand") (match_operand:SI 2 "immediate_operand")] "TARGET_SIMD" {