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RFA: MN10300: Fix splitting AND insns

Message ID m3wrdk2v3j.fsf@redhat.com
State New
Headers show

Commit Message

Nick Clifton Sept. 7, 2011, 4:08 p.m. UTC 
Hi Jeff, Hi Alex,

  I have finally tracked down a bug in the MN10300 backend which has
  been causing all kinds of weird behaviour in generated code.  The
  problem was that the pattern to split an AND insn into two shift insns
  was using a left shift followed by a right shift to clear bits at the
  *bottom* of a word...

  It turns out that this was because of the mn10300_split_and_operand_count 
  function which was returning a negative value for both clears at the
  top of the word and at the bottom.  Once I had found this the fix was
  easy, and with the patch below applied I now have 28 fewer GCC
  testsuite failures, 7 fewer G++ testsuite failures and no
  regressions.

  OK to apply ?

Cheers
  Nick

gcc/ChangeLog
2011-09-07  Nick Clifton  <nickc@redhat.com>

	* config/mn10300/mn10300.c (mn10300_split_and_operand_count):
	Return a positive value to indicate that the bits at the
	bottom of the register should be cleared.
diff mbox

Patch

Index: gcc/config/mn10300/mn10300.c
===================================================================
--- gcc/config/mn10300/mn10300.c	(revision 178626)
+++ gcc/config/mn10300/mn10300.c	(working copy)
@@ -2894,7 +2894,7 @@ 
 	 would be replacing 1 6-byte insn with 2 3-byte insns.  */
       if (count > (optimize_insn_for_speed_p () ? 2 : 4))
 	return 0;
-      return -count;
+      return count;
     }
   else
     {