@@ -14868,6 +14868,92 @@ rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
return reverse_condition (code);
}
+/* If C can be rotated to a constant which all bits are 0, except lowest
+ N bits. MASK contains 1 in the lowest N bits, other bits are 0.
+ e.g. rotl(0x0000098760000000ULL, 36) == 0x9876, which high 48bits are 0.
+ Return the number by which the SRC is rotated, or -1 if fail to rotate. */
+
+static int
+rot_bits_to_mask (unsigned HOST_WIDE_INT C, unsigned HOST_WIDE_INT mask,
+ int total_bits = 64)
+{
+ /* The position of mask regard to the highest bit. */
+ int pos_mask = clz_hwi (mask);
+
+ /* Bits are lowest already, e.g. 0x1234ULL. */
+ int pos = clz_hwi (C);
+ if (pos_mask < pos)
+ return 0;
+
+ /* Bits in the middle, e.g. 0x0000098760000000ULL => 0x9876. */
+ if ((C & (mask << (pos_mask - pos))) == C)
+ return total_bits - (pos_mask - pos);
+
+ /* Bits are at hightest and lowest together:
+ e.g. 0xc000000000000001ULL => 0xe000. */
+ unsigned HOST_WIDE_INT low_bits = C & mask;
+ pos = clz_hwi (low_bits);
+ int n = pos - pos_mask;
+ unsigned HOST_WIDE_INT rot_C = (C << n) | (C >> (total_bits - n));
+ if ((rot_C & mask) == rot_C)
+ return n;
+
+ return -1;
+}
+
+/* Check if able to optimize the comparison on rotated operands.
+ Return the number by which the SRC is rotated, or -1 if fail to rotate.
+ */
+static int
+rotate_comparison_ops (rtx cmp, machine_mode mode, bool *sgn_cmp, rtx *cst)
+{
+ /* Now only support compare on DImode, for "== or !=". */
+ if (mode != DImode)
+ return -1;
+
+ enum rtx_code code = GET_CODE (cmp);
+ if (code != NE && code != EQ)
+ return -1;
+
+ rtx op1 = XEXP (cmp, 1);
+
+ /* The constant would already been set to a reg in the last insn. */
+ rtx_insn *last = get_last_insn_anywhere ();
+ rtx src = NULL_RTX;
+ if (last && single_set (last) && SET_DEST (single_set (last)) == op1)
+ src = SET_SRC (single_set (last));
+
+ /* It constant may be in constant pool. */
+ if (src && MEM_P (src))
+ src = avoid_constant_pool_reference (src);
+
+ /* Check if able to compare against rotated const. */
+ if (!(src && CONST_INT_P (src)))
+ return -1;
+
+ unsigned HOST_WIDE_INT C = INTVAL (src);
+
+ /* For case like 0x0000098760000000ULL, use logical cmpldi. */
+ int rot = rot_bits_to_mask (C, 0xFFFFULL);
+ if (rot >= 0)
+ {
+ *cst = src;
+ *sgn_cmp = false;
+ return rot;
+ }
+
+ /* For case like 0x8765FFFFFFFFFFFFLL, use sign cmpdi. */
+ rot = rot_bits_to_mask (~C, 0x7FFFULL);
+ if (rot >= 0)
+ {
+ *cst = src;
+ *sgn_cmp = true;
+ return rot;
+ }
+
+ return -1;
+}
+
/* Generate a compare for CODE. Return a brand-new rtx that
represents the result of the compare. */
@@ -14897,6 +14983,20 @@ rs6000_generate_compare (rtx cmp, machine_mode mode)
else
comp_mode = CCmode;
+ /* "i == C" ==> "rotl(i,N) == rotl(C,N)" if rotl(C,N) only low 16bits. */
+ bool sgn_cmp = false;
+ rtx cst = NULL_RTX;
+ int rot_bits = rotate_comparison_ops (cmp, mode, &sgn_cmp, &cst);
+ if (rot_bits > 0)
+ {
+ rtx n = GEN_INT (rot_bits);
+ rtx rot_op0 = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (rot_op0, gen_rtx_ROTATE (mode, op0, n)));
+ op0 = rot_op0;
+ op1 = simplify_gen_binary (ROTATE, mode, cst, n);
+ comp_mode = sgn_cmp ? CCmode : CCUNSmode;
+ }
+
/* If we have an unsigned compare, make sure we don't have a signed value as
an immediate. */
if (comp_mode == CCUNSmode && CONST_INT_P (op1)
new file mode 100644
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "cmpldi" 10 } } */
+/* { dg-final { scan-assembler-times "cmpdi" 4 } } */
+/* { dg-final { scan-assembler-times "rotldi" 10 } } */
+
+int foo (int a);
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ if (in == (0x7567000000LL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFLL))
+ return foo (19);
+
+ return 0;
+}
new file mode 100644
@@ -0,0 +1,95 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -std=c99" } */
+
+int
+foo (int a)
+{
+ return a + 6;
+}
+
+int __attribute__ ((noinline)) udi_fun (unsigned long long in)
+{
+ if (in == (0x8642000000000000ULL))
+ return foo (1);
+ if (in == (0x7642000000000000ULL))
+ return foo (12);
+ if (in == (0x8000000000000000ULL))
+ return foo (32);
+ if (in == (0x8000000000000001ULL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFULL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFULL))
+ return foo (51);
+ if (in == (0x7567000000ULL))
+ return foo (9);
+ if (in == (0xFFF8567FFFFFFFFFULL))
+ return foo (19);
+
+ return 0;
+}
+
+int __attribute__ ((noinline)) di_fun (long long in)
+{
+ if (in == (0x8642000000000000LL))
+ return foo (1);
+ if (in == (0x7642000000000000LL))
+ return foo (12);
+ if (in == (0x8000000000000000LL))
+ return foo (32);
+ if (in == (0x8000000000000001LL))
+ return foo (33);
+ if (in == (0x8642FFFFFFFFFFFFLL))
+ return foo (46);
+ if (in == (0x7642FFFFFFFFFFFFLL))
+ return foo (51);
+ return 0;
+}
+
+int
+main ()
+{
+ int e = 0;
+ if (udi_fun (6) != 0)
+ e++;
+ if (udi_fun (0x8642000000000000ULL) != foo (1))
+ e++;
+ if (udi_fun (0x7642000000000000ULL) != foo (12))
+ e++;
+ if (udi_fun (0x8000000000000000ULL) != foo (32))
+ e++;
+ if (udi_fun (0x8000000000000001ULL) != foo (33))
+ e++;
+ if (udi_fun (0x8642FFFFFFFFFFFFULL) != foo (46))
+ e++;
+ if (udi_fun (0x7642FFFFFFFFFFFFULL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000ULL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFULL) != foo (19))
+ e++;
+
+ if (di_fun (6) != 0)
+ e++;
+ if (di_fun (0x8642000000000000LL) != foo (1))
+ e++;
+ if (di_fun (0x7642000000000000LL) != foo (12))
+ e++;
+ if (di_fun (0x8000000000000000LL) != foo (32))
+ e++;
+ if (di_fun (0x8000000000000001LL) != foo (33))
+ e++;
+ if (di_fun (0x8642FFFFFFFFFFFFLL) != foo (46))
+ e++;
+ if (di_fun (0x7642FFFFFFFFFFFFLL) != foo (51))
+ e++;
+ if (udi_fun (0x7567000000LL) != foo (9))
+ e++;
+ if (udi_fun (0xFFF8567FFFFFFFFFLL) != foo (19))
+ e++;
+
+ if (e)
+ __builtin_abort ();
+ return 0;
+}
+
Hi, This patch is based on: https://gcc.gnu.org/pipermail/gcc-patches/2022-May/594252.html. When checking eq/neq with a constant which has only 16bits, then it can be optimized to check the rotated data. By this, the constant building is optimized. As the example in PR103743: For "in == 0x8000000000000000LL", this patch generates: rotldi %r3,%r3,16 cmpldi %cr0,%r3,32768 instead: li %r9,-1 rldicr %r9,%r9,0,0 cmpd %cr0,%r3,%r9 Compare with previous patch, this patch refactors the code, and also supports the comparison on the constant like: "0xc000000000000001LL", which constant has 16bits (combined from high and low bits). This patch pass bootstrap and regtest on ppc64 and ppc64le. Ok for trunk? Thanks! BR, Jiufu PR target/103743 gcc/ChangeLog: * config/rs6000/rs6000.cc (rot_bits_to_mask): New. (rotate_comparison_ops): New. (rs6000_generate_compare): Optimize compare on const. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr103743.c: New test. * gcc.target/powerpc/pr103743_1.c: New test. --- gcc/config/rs6000/rs6000.cc | 100 ++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr103743.c | 52 +++++++++ gcc/testsuite/gcc.target/powerpc/pr103743_1.c | 95 +++++++++++++++++ 3 files changed, 247 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103743_1.c