From patchwork Fri Mar 4 13:25:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 592043 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9A51D140213 for ; Sat, 5 Mar 2016 00:27:02 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=G3xDObcr; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; q=dns; s=default; b=uf3XviIrW9KHTXFqskf owzzSOIB81Xc02zFbX8u4SkmkA52EKfVYokG02h/N98yOBgdmeoOC7R/R08K2JW9 +XO8hrdgigDdsNEO9eTIvLjIigHCIWFjzivw9XOPA3zwsIjhbqnRrUzjLaSe19cK rys2sVp5BclhJoT7hV64YnoM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; s=default; bh=CHSvlfx5WUVSVqhjaamDsOq18 qE=; b=G3xDObcrllb3R/uU0zgZIiNqMf4nZ/9LcdsVBFL3xJwyv1YXPWbfnZmm+ kGraJEjzAMosyeZAkEA2JtYxSi8bzZdBsCjg/UqLSF4T+rdx63lTa7B7L5k7pabT w8qwV+Fx0iHWmUbpyqfR/4nDS3Zu7AlaMybaBBuDzwyKCcuges= Received: (qmail 42885 invoked by alias); 4 Mar 2016 13:26:10 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 42807 invoked by uid 89); 4 Mar 2016 13:26:09 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=626, masked X-HELO: mail-wm0-f52.google.com Received: from mail-wm0-f52.google.com (HELO mail-wm0-f52.google.com) (74.125.82.52) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 04 Mar 2016 13:25:56 +0000 Received: by mail-wm0-f52.google.com with SMTP id p65so20269897wmp.1 for ; Fri, 04 Mar 2016 05:25:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=/F+41YS8tzGt5vFxt4S2t3auHbL8PrglSfVXh9hLozE=; b=Mf8V+yDGIqsHKhlJmBz/mJhrbG+8Vp1MhWu3PTrcGTHBxYCnWhK1Bw1TtemWs5lN2T UOLqa7+F3vclM/nv/QtEGy9SxoGTP6R8GKkNr5nXDA7cp29GZlONuwkCoOhBh6uGHFf6 hBesmRExJralA8e5Z7Ofb1Taf5/eWv1cVnOBtXTxcnfzOoNwBxZ5z2vTr9uWntq2Xef4 c6L8CEb+9EbJ3FxNotPKlrAKENQrwA5kcrI6SCZPk9fEdngRabXBn9wVLSGp9RRIJpFd ILGVs1ngen3FrR92Sy5gvU5YfBEVPX7Xfr01OZdX8dyUd6McgNkcWFt2+aHv5UinOHtB r4Iw== X-Gm-Message-State: AD7BkJLzAEZzMy7Xth6VBrYACpVLuoDblvpMTHKIHJFgFP00vlJ7nwxq+QYZ771kL60d2Q== X-Received: by 10.194.58.169 with SMTP id s9mr9240747wjq.52.1457097953401; Fri, 04 Mar 2016 05:25:53 -0800 (PST) Received: from localhost (host86-138-94-184.range86-138.btcentralplus.com. [86.138.94.184]) by smtp.gmail.com with ESMTPSA id 198sm3341092wml.22.2016.03.04.05.25.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Mar 2016 05:25:52 -0800 (PST) From: Andrew Burgess To: gcc-patches@gcc.gnu.org Cc: noamca@mellanox.com, Claudiu.Zissulescu@synopsys.com, Andrew Burgess Subject: [PATCH 02/10] gcc/arc: Add -munaligned-access option for nps400 Date: Fri, 4 Mar 2016 13:25:34 +0000 Message-Id: In-Reply-To: References: In-Reply-To: References: X-IsSubscribed: yes New option for nps400 arc (-munaligned-access) that allows GCC to generate unaligned accesses, the option is off by default. Turning this option on will update the value for STRICT_ALIGNMENT. gcc/ChangeLog: * config/arc/arc.h (ARC_NPS400): Define if not already defined. (UNALIGNED_ACCESS_DEFAULT): Define, if not already defined. (STRICT_ALIGNMENT): Make use of unaligned_access var. * config/arc/arc.c (arc_expand_movmem): Take STRICT_ALIGNMENT into account. * config/arc/arc.opt: (munaligned-access): New option. * config/arc/t-nps400: Add munaligned-access to the multilib list. gcc/testsuite/ChangeLog: * gcc.target/arc/setmem-1.c: New file. * gcc.target/arc/setmem-2.c: New file. * gcc.target/arc/setmem-3.c: New file. * gcc.target/arc/setmem-4.c: New file. --- gcc/ChangeLog.NPS400 | 11 +++++++++++ gcc/config/arc/arc.c | 4 ++-- gcc/config/arc/arc.h | 19 +++++++++++++++---- gcc/config/arc/arc.opt | 4 ++++ gcc/config/arc/t-nps400 | 2 +- gcc/testsuite/ChangeLog.NPS400 | 6 ++++++ gcc/testsuite/gcc.target/arc/setmem-1.c | 13 +++++++++++++ gcc/testsuite/gcc.target/arc/setmem-2.c | 18 ++++++++++++++++++ gcc/testsuite/gcc.target/arc/setmem-3.c | 13 +++++++++++++ gcc/testsuite/gcc.target/arc/setmem-4.c | 18 ++++++++++++++++++ 10 files changed, 101 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/ChangeLog.NPS400 create mode 100644 gcc/testsuite/gcc.target/arc/setmem-1.c create mode 100644 gcc/testsuite/gcc.target/arc/setmem-2.c create mode 100644 gcc/testsuite/gcc.target/arc/setmem-3.c create mode 100644 gcc/testsuite/gcc.target/arc/setmem-4.c diff --git a/gcc/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400 index 286f2dd..0281640 100644 --- a/gcc/ChangeLog.NPS400 +++ b/gcc/ChangeLog.NPS400 @@ -1,3 +1,14 @@ +2016-02-02 Joern Rennecke + Andrew Burgess + + * config/arc/arc.h (ARC_NPS400): Define if not already defined. + (UNALIGNED_ACCESS_DEFAULT): Define, if not already defined. + (STRICT_ALIGNMENT): Make use of unaligned_access var. + * config/arc/arc.c (arc_expand_movmem): Take STRICT_ALIGNMENT into + account. + * config/arc/arc.opt: (munaligned-access): New option. + * config/arc/t-nps400: Add munaligned-access to the multilib list. + 2016-02-01 Andrew Burgess * config.gcc: Add support for arc*-mellanox-* nps400 targets. diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index d60db50..35bb44a 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -7137,7 +7137,7 @@ arc_expand_movmem (rtx *operands) HOST_WIDE_INT size; int align = INTVAL (operands[3]); unsigned n_pieces; - int piece = align; + int piece = STRICT_ALIGNMENT ? align : 4; rtx store[2]; rtx tmpx[2]; int i; @@ -7146,7 +7146,7 @@ arc_expand_movmem (rtx *operands) return false; size = INTVAL (operands[2]); /* move_by_pieces_ninsns is static, so we can't use it. */ - if (align >= 4) + if (align >= 4 || !STRICT_ALIGNMENT) { if (TARGET_LL64) n_pieces = (size + 4) / 8U + ((size >> 1) & 1) + (size & 1); diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index 21c049f..1cb59ec 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -62,6 +62,10 @@ along with GCC; see the file COPYING3. If not see #undef ASM_APP_OFF #undef CC1_SPEC +#ifndef ARC_NPS400 +#define ARC_NPS400 0 +#endif + /* Names to predefine in the preprocessor for this target machine. */ #define TARGET_CPU_CPP_BUILTINS() \ do { \ @@ -309,6 +313,10 @@ along with GCC; see the file COPYING3. If not see #define MULTILIB_DEFAULTS { "mARC700" } #endif +#ifndef UNALIGNED_ACCESS_DEFAULT +#define UNALIGNED_ACCESS_DEFAULT 0 +#endif + /* Target machine storage layout. */ /* We want zero_extract to mean the same @@ -416,10 +424,13 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \ /* Set this nonzero if move instructions will actually fail to work when given unaligned data. */ -/* On the ARC the lower address bits are masked to 0 as necessary. The chip - won't croak when given an unaligned address, but the insn will still fail - to produce the correct result. */ -#define STRICT_ALIGNMENT 1 +/* On most ARC cores the lower address bits are masked to 0 as necessary, + the chip won't croak when given an unaligned address, but the insn will + still fail to produce the correct result. */ +/* The NPS400 ARC variant supports unaligned access. Although not without + cost, this is still fast enough that we can justify keeping + SLOW_UNALIGNED_ACCESS off. */ +#define STRICT_ALIGNMENT (!unaligned_access) /* Layout of source language data types. */ diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index 2227b75..f8e062c 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -456,3 +456,7 @@ Enum(arc_fpu) String(fpus_all) Value(FPU_SP | FPU_SC | FPU_SF | FPU_SD) EnumValue Enum(arc_fpu) String(fpud_all) Value(FPU_SP | FPU_SC | FPU_SF | FPU_SD | FPU_DP | FPU_DC | FPU_DF | FPU_DD) + +munaligned-access +Target Report Var(unaligned_access) Init(UNALIGNED_ACCESS_DEFAULT) Condition(ARC_NPS400) +Enable unaligned word and halfword accesses to packed data. diff --git a/gcc/config/arc/t-nps400 b/gcc/config/arc/t-nps400 index e332e24..2d96b78 100644 --- a/gcc/config/arc/t-nps400 +++ b/gcc/config/arc/t-nps400 @@ -18,4 +18,4 @@ # with GCC; see the file COPYING3. If not see # . -MULTILIB_OPTIONS= +MULTILIB_OPTIONS=munaligned-access diff --git a/gcc/testsuite/ChangeLog.NPS400 b/gcc/testsuite/ChangeLog.NPS400 new file mode 100644 index 0000000..b49dc1a --- /dev/null +++ b/gcc/testsuite/ChangeLog.NPS400 @@ -0,0 +1,6 @@ +2016-02-03 Joern Rennecke + + * gcc.target/arc/setmem-1.c: New file. + * gcc.target/arc/setmem-2.c: New file. + * gcc.target/arc/setmem-3.c: New file. + * gcc.target/arc/setmem-4.c: New file. diff --git a/gcc/testsuite/gcc.target/arc/setmem-1.c b/gcc/testsuite/gcc.target/arc/setmem-1.c new file mode 100644 index 0000000..926974e --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/setmem-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target arc*-mellanox-* } } */ +/* { dg-options "-O2 -munaligned-access" } */ + +extern void *memcpy (void *, const void *, __SIZE_TYPE__); + +void +f (char *d) +{ + static const char a[] = "abcdefghijklmnopqrstuvwxyz"; + memcpy (d, a, 20); +} +/* { dg-final { scan-assembler-not "stb" } } */ +/* { dg-final { scan-assembler-not "memcpy" } } */ diff --git a/gcc/testsuite/gcc.target/arc/setmem-2.c b/gcc/testsuite/gcc.target/arc/setmem-2.c new file mode 100644 index 0000000..a034fbd --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/setmem-2.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target arc*-mellanox-* } } */ +/* { dg-options "-O2 -munaligned-access" } */ + +extern void *memcpy (void *, const void *, __SIZE_TYPE__); + +void +f (char *d) +{ + static const char a[] = + { + 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', + 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', + 'u', 'v', 'w', 'x', 'y', 'z', + }; + memcpy (d, a, 20); +} +/* { dg-final { scan-assembler-not "stb" } } */ +/* { dg-final { scan-assembler-not "memcpy" } } */ diff --git a/gcc/testsuite/gcc.target/arc/setmem-3.c b/gcc/testsuite/gcc.target/arc/setmem-3.c new file mode 100644 index 0000000..660d924 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/setmem-3.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target arc*-mellanox-* } } */ +/* { dg-options "-O2 -munaligned-access" } */ + +extern void *memcpy (void *, const void *, __SIZE_TYPE__); + +void +f (char *d) +{ + const char a[26] = "abcdefghijklmnopqrstuvwxyz"; + memcpy (d, a, 20); +} +/* { dg-final { scan-assembler-not "stb" } } */ +/* { dg-final { scan-assembler-not "memcpy" } } */ diff --git a/gcc/testsuite/gcc.target/arc/setmem-4.c b/gcc/testsuite/gcc.target/arc/setmem-4.c new file mode 100644 index 0000000..b5c1ee6 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/setmem-4.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target arc*-mellanox-* } } */ +/* { dg-options "-O2 -munaligned-access" } */ + +extern void *memcpy (void *, const void *, __SIZE_TYPE__); + +void +f (char *d) +{ + const char a[26] = + { + 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', + 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', + 'u', 'v', 'w', 'x', 'y', 'z', + }; + memcpy (d, a, 20); +} +/* { dg-final { scan-assembler-not "stb" } } */ +/* { dg-final { scan-assembler-not "memcpy" } } */