| Message ID | f887636a-a978-4046-bebd-ba9efb5aa5e9@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [PATCH-3v5,rs6000] Implement optab_isnormal for SFDF and IEEE128 | expand |
Hi Haochen, on 2024/7/18 09:45, HAO CHEN GUI wrote: > Hi, > This patch implemented optab_isnormal for SFDF and IEEE128 by > test data class instructions. > > Compared with previous version, the main change is to merge > the patterns of SFDF and IEEE128 into one. > https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655781.html > > Bootstrapped and tested on powerpc64-linux BE and LE with no > regressions. Is it OK for trunk? > > Thanks > Gui Haochen > > ChangeLog > rs6000: Implement optab_isnormal for SFDF and IEEE128 > > gcc/ > PR target/97786 > * config/rs6000/vsx.md (isnormal<mode>2): New expand. > > gcc/testsuite/ > PR target/97786 > * gcc.target/powerpc/pr97786-7.c: New test. > * gcc.target/powerpc/pr97786-8.c: New test. > > patch.diff > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > index 763cd916c8d..f818aba9e3e 100644 > --- a/gcc/config/rs6000/vsx.md > +++ b/gcc/config/rs6000/vsx.md > @@ -5318,6 +5318,23 @@ (define_expand "isfinite<mode>2" > DONE; > }) > > +(define_expand "isnormal<mode>2" > + [(use (match_operand:SI 0 "gpc_reg_operand")) > + (use (match_operand:IEEE_FP 1 "<fp_register_op>"))] > + "TARGET_P9_VECTOR > + && (!FLOAT128_IEEE_P (<MODE>mode) || TARGET_FLOAT128_HW)" > +{ > + rtx tmp = gen_reg_rtx (SImode); Nit: maybe add one comment like /* It is neither NAN, infinite, zero, nor denormal. */ OK for trunk with/without this tweaked, thanks. BR, Kewen > + int mask = VSX_TEST_DATA_CLASS_NAN > + | VSX_TEST_DATA_CLASS_POS_INF | VSX_TEST_DATA_CLASS_NEG_INF > + | VSX_TEST_DATA_CLASS_POS_ZERO | VSX_TEST_DATA_CLASS_NEG_ZERO > + | VSX_TEST_DATA_CLASS_POS_DENORMAL > + | VSX_TEST_DATA_CLASS_NEG_DENORMAL; > + emit_insn (gen_xststdc_<mode> (tmp, operands[1], GEN_INT (mask))); > + emit_insn (gen_xorsi3 (operands[0], tmp, const1_rtx)); > + DONE; > +}) > + > ;; The VSX Scalar Test Negative Quad-Precision > (define_expand "xststdcnegqp_<mode>" > [(set (match_dup 2) > diff --git a/gcc/testsuite/gcc.target/powerpc/pr97786-7.c b/gcc/testsuite/gcc.target/powerpc/pr97786-7.c > new file mode 100644 > index 00000000000..eb01eed39d3 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr97786-7.c > @@ -0,0 +1,17 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ > +/* { dg-require-effective-target powerpc_vsx } */ > + > +int test1 (double x) > +{ > + return __builtin_isnormal (x); > +} > + > +int test2 (float x) > +{ > + return __builtin_isnormal (x); > +} > + > +/* { dg-final { scan-assembler-not {\mfcmp} } } */ > +/* { dg-final { scan-assembler-times {\mxststdcsp\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mxststdcdp\M} 1 } } */ > diff --git a/gcc/testsuite/gcc.target/powerpc/pr97786-8.c b/gcc/testsuite/gcc.target/powerpc/pr97786-8.c > new file mode 100644 > index 00000000000..eba90d3b1b7 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr97786-8.c > @@ -0,0 +1,12 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target ppc_float128_hw } */ > +/* { dg-options "-O2 -mdejagnu-cpu=power9 -mabi=ieeelongdouble -Wno-psabi" } */ > +/* { dg-require-effective-target powerpc_vsx } */ > + > +int test1 (long double x) > +{ > + return __builtin_isnormal (x); > +} > + > +/* { dg-final { scan-assembler-not {\mxscmpuqp\M} } } */ > +/* { dg-final { scan-assembler {\mxststdcqp\M} } } */
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 763cd916c8d..f818aba9e3e 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -5318,6 +5318,23 @@ (define_expand "isfinite<mode>2" DONE; }) +(define_expand "isnormal<mode>2" + [(use (match_operand:SI 0 "gpc_reg_operand")) + (use (match_operand:IEEE_FP 1 "<fp_register_op>"))] + "TARGET_P9_VECTOR + && (!FLOAT128_IEEE_P (<MODE>mode) || TARGET_FLOAT128_HW)" +{ + rtx tmp = gen_reg_rtx (SImode); + int mask = VSX_TEST_DATA_CLASS_NAN + | VSX_TEST_DATA_CLASS_POS_INF | VSX_TEST_DATA_CLASS_NEG_INF + | VSX_TEST_DATA_CLASS_POS_ZERO | VSX_TEST_DATA_CLASS_NEG_ZERO + | VSX_TEST_DATA_CLASS_POS_DENORMAL + | VSX_TEST_DATA_CLASS_NEG_DENORMAL; + emit_insn (gen_xststdc_<mode> (tmp, operands[1], GEN_INT (mask))); + emit_insn (gen_xorsi3 (operands[0], tmp, const1_rtx)); + DONE; +}) + ;; The VSX Scalar Test Negative Quad-Precision (define_expand "xststdcnegqp_<mode>" [(set (match_dup 2) diff --git a/gcc/testsuite/gcc.target/powerpc/pr97786-7.c b/gcc/testsuite/gcc.target/powerpc/pr97786-7.c new file mode 100644 index 00000000000..eb01eed39d3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr97786-7.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ +/* { dg-require-effective-target powerpc_vsx } */ + +int test1 (double x) +{ + return __builtin_isnormal (x); +} + +int test2 (float x) +{ + return __builtin_isnormal (x); +} + +/* { dg-final { scan-assembler-not {\mfcmp} } } */ +/* { dg-final { scan-assembler-times {\mxststdcsp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxststdcdp\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr97786-8.c b/gcc/testsuite/gcc.target/powerpc/pr97786-8.c new file mode 100644 index 00000000000..eba90d3b1b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr97786-8.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ppc_float128_hw } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -mabi=ieeelongdouble -Wno-psabi" } */ +/* { dg-require-effective-target powerpc_vsx } */ + +int test1 (long double x) +{ + return __builtin_isnormal (x); +} + +/* { dg-final { scan-assembler-not {\mxscmpuqp\M} } } */ +/* { dg-final { scan-assembler {\mxststdcqp\M} } } */