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Wed, 04 Jan 2023 06:17:09 +0000 Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay03.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3046H5wd40960482 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 4 Jan 2023 06:17:05 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 62DE92004E; Wed, 4 Jan 2023 06:17:05 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AD7ED20043; Wed, 4 Jan 2023 06:17:02 +0000 (GMT) Received: from [9.200.36.180] (unknown [9.200.36.180]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 4 Jan 2023 06:17:02 +0000 (GMT) Message-ID: Date: Wed, 4 Jan 2023 14:17:01 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Content-Language: en-US To: gcc-patches Cc: Segher Boessenkool , David , "Kewen.Lin" , Peter Bergner Subject: [PATCH-3, rs6000] Change mode and insn condition for scalar insert exp instruction X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: bNUnuUcu4SGcXfOug_Qeb0a8ahIhamzl X-Proofpoint-GUID: zJJWbnBxkW8UJjsaaqOS0j8Zjck-s2qT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-04_02,2023-01-03_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 mlxlogscore=999 malwarescore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 spamscore=0 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301040050 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: HAO CHEN GUI via Gcc-patches From: HAO CHEN GUI Reply-To: HAO CHEN GUI Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch changes the mode of exponent to GPR in scalar insert exp pattern, as the exponent can be put into a 32-bit register. Also the condition check is changed from TARGET_64BIT to TARGET_POWERPC64. The test cases are modified according to the changes of expand pattern. Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? Any recommendations? Thanks a lot. Gui Haochen ChangeLog 2023-01-03 Haochen Gui gcc/ * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp to xsiexpdp_di. (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from xsiexpdpf to xsiexpdpf_di. * config/rs6000/vsx.md (xsiexpdp): Rename to... (xsiexpdp_): ..., set the mode of second operand to GPR and replace TARGET_64BIT with TARGET_POWERPC64. (xsiexpdpf): Rename to... (xsiexpdpf_): ..., set the mode of second operand to GPR and replace TARGET_64BIT with TARGET_POWERPC64. gcc/testsuite/ * gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Replace lp64 check with has_arch_ppc64. * gcc.target/powerpc/bfp/scalar-insert-exp-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-12.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-13.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-4.c: Likewise. patch.diff diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 25647b7bdd2..b1b5002d7d9 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2854,10 +2854,10 @@ const double __builtin_vsx_scalar_insert_exp (unsigned long long, \ unsigned long long); - VSIEDP xsiexpdp {} + VSIEDP xsiexpdp_di {} const double __builtin_vsx_scalar_insert_exp_dp (double, unsigned long long); - VSIEDPF xsiexpdpf {} + VSIEDPF xsiexpdpf_di {} pure vsc __builtin_vsx_xl_len_r (void *, signed long); XL_LEN_R xl_len_r {} diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 27e03a4cf6c..3376090cc6f 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -5137,22 +5137,22 @@ (define_insn "xsiexpqp_" [(set_attr "type" "vecmove")]) ;; VSX Scalar Insert Exponent Double-Precision -(define_insn "xsiexpdp" +(define_insn "xsiexpdp_" [(set (match_operand:DF 0 "vsx_register_operand" "=wa") (unspec:DF [(match_operand:DI 1 "register_operand" "r") - (match_operand:DI 2 "register_operand" "r")] + (match_operand:GPR 2 "register_operand" "r")] UNSPEC_VSX_SIEXPDP))] - "TARGET_P9_VECTOR && TARGET_64BIT" + "TARGET_P9_VECTOR && TARGET_POWERPC64" "xsiexpdp %x0,%1,%2" [(set_attr "type" "fpsimple")]) ;; VSX Scalar Insert Exponent Double-Precision Floating Point Argument -(define_insn "xsiexpdpf" +(define_insn "xsiexpdpf_" [(set (match_operand:DF 0 "vsx_register_operand" "=wa") (unspec:DF [(match_operand:DF 1 "register_operand" "r") - (match_operand:DI 2 "register_operand" "r")] + (match_operand:GPR 2 "register_operand" "r")] UNSPEC_VSX_SIEXPDP))] - "TARGET_P9_VECTOR && TARGET_64BIT" + "TARGET_P9_VECTOR && TARGET_POWERPC64" "xsiexpdp %x0,%1,%2" [(set_attr "type" "fpsimple")]) diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c index d8243258a67..88d77564158 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ /* This test should succeed only on 64-bit configurations. */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c index 8260b107178..2f219ddc83a 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ /* This test should succeed only on 64-bit configurations. */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c index 384fc9cc675..9eade34d9ad 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c @@ -1,7 +1,7 @@ /* { dg-do run { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-mdejagnu-cpu=power9" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ /* This test should succeed only on 64-bit configurations. */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c index 0e004224277..674fba951ae 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c @@ -1,7 +1,7 @@ /* { dg-do run { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-mdejagnu-cpu=power9" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ /* This test should succeed only on 64-bit configurations. */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c index 3ecbe3318e8..afa2b83f2d2 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ /* This test should succeed only on 64-bit configurations. */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c index 1699c67a2f1..6dc06dd34ea 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ /* This test should succeed only on 64-bit configurations. */ #include