From patchwork Sat Dec 9 13:18:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Dapp X-Patchwork-Id: 1874042 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=N2JOCQhr; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SnT9g4WXsz23n0 for ; Sun, 10 Dec 2023 00:19:03 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AC9743857BA6 for ; Sat, 9 Dec 2023 13:18:54 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by sourceware.org (Postfix) with ESMTPS id 967873858D35 for ; Sat, 9 Dec 2023 13:18:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 967873858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 967873858D35 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::42e ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702127924; cv=none; b=vu/yBpxSEHLI4XHFKeyX2DCAvyBOO6dXRRVx1XVxdhj4ZuSRYZBSFSA+2TTW7uz4rkmQLNBRCwOdgAILbJ++ws6kgVnkrr+F+UR6Y/k/o6mmObFI8oIsEK1VSSKRNmF0YcoV9sWEePtngKZxU1s+U2gL+RTqqptpm2mDgh2ZwjQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702127924; c=relaxed/simple; bh=JIiCAXy/b1HSW0lDJa4OwAkJ864aoTT5nRYf8XIwrL8=; h=DKIM-Signature:Message-ID:Date:MIME-Version:To:From:Subject; b=Rzg51IMcMJrmkFjKCImSdUBm/4Rdl8HXKqcsBYct4b9jF62+njPxQgr78lAgs3GEMliiIBGIXGYpNMPATzkZv96u42zMn4vdC9xrNLOxtH0l8YjpLZxUOkzitn1bvUV+XkVju8zpOq/tBkWIDY5rtcHLiAM+xoiM+rsKfBO/t94= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-32f8441dfb5so2797762f8f.0 for ; Sat, 09 Dec 2023 05:18:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702127918; x=1702732718; darn=gcc.gnu.org; h=content-transfer-encoding:subject:from:to:content-language:cc :user-agent:mime-version:date:message-id:from:to:cc:subject:date :message-id:reply-to; bh=gZkALxnpv549sbfMy0lWRH1CP5UkWCqK4HUWcmdXFhY=; b=N2JOCQhrOMzLt/EQyaZ42k7saAEcswGzuKhzmKoLN02dFJCXKPQ0Ya9nLHVPPMQTlr BzRyOHEglCnqJnOGcbviGk6JofTmKiSf2sqijTeSdfkARx3AKmnDr+kX7qh4p6awtBJN ORLcpV+g4sl5d6gA7rcW+yB963xUtdBx6rVYYoXsrwvCw5pxGDOjDjlXwdHg7JV6Fyrk 2VeBQMo6QeZSBWqj2JQHVCbgRUAjMDMY0POn3C9CzcQlhRxbS7pfPFGSj8vntRdj4nYY dGcJkfxIw7KCwnLoelmdasUpnVDsld2ft7Ea/BA4g+PNAWSLhytXTyAK9Y4WSAYEl4qx XPSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702127918; x=1702732718; h=content-transfer-encoding:subject:from:to:content-language:cc :user-agent:mime-version:date:message-id:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=gZkALxnpv549sbfMy0lWRH1CP5UkWCqK4HUWcmdXFhY=; b=V4RCnBrSZvHUNrHH2L8ErjaJF9tCZj4GXzJkU5VQsYMp/SyVIugDep8Zle0yGVx0AE UmQ0YRVXtHIctmJRksDgE5mB9QdSVsytPmzlCRC4c6uxVQIdUTruiFRcAm5O4vMIeSjW 4cnVlKTC7bleeJcZ2YW4SjccjrjNYEa6O6GPwt+X4nDgRdk6xhXXVH67TUqrvj/jZpVW 5n40aj/sXirgZaDRXM5Zp3D34wPonY3zBlFE3W9lp9whRVkRRcdmhSo4UPboXwAuKwnw /qrDpo8rqfFCPwIBa8bcCmAlq4yIzns1j0mWtRo6qmH0ou4PMmPSl3lAQhNFkKwFz4Sv RCsg== X-Gm-Message-State: AOJu0Yz6V8X354MSy9BpAAoCgmUtBEQKNTHyFVeKwzIVXXU4YVNCRibO VdCe6fGcfKNYzDdaaY+iQxBOZHgrflI= X-Google-Smtp-Source: AGHT+IGTtW1wvP+vs0jua4leWX4SdQigu5ngDia3nL1eMZGIsmQp4P9C1jP2ln60i92mn+vE4aLvkw== X-Received: by 2002:a5d:43d2:0:b0:333:408a:9563 with SMTP id v18-20020a5d43d2000000b00333408a9563mr833773wrr.124.1702127917678; Sat, 09 Dec 2023 05:18:37 -0800 (PST) Received: from [192.168.1.24] (ip-149-172-150-237.um42.pools.vodafone-ip.de. [149.172.150.237]) by smtp.gmail.com with ESMTPSA id ts7-20020a170907c5c700b00a1dd58874b8sm2205332ejc.119.2023.12.09.05.18.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 09 Dec 2023 05:18:37 -0800 (PST) Message-ID: Date: Sat, 9 Dec 2023 14:18:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: rdapp.gcc@gmail.com Content-Language: en-US To: gcc-patches , palmer , Kito Cheng , jeffreyalaw , "juzhe.zhong@rivai.ai" From: Robin Dapp Subject: [PATCH] RISC-V: Recognize stepped series in expand_vec_perm_const. X-Spam-Status: No, score=-9.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, we currently try to recognize various forms of stepped (const_vector) sequence variants in expand_const_vector. Because of complications with canonicalization and encoding it is easier to identify such patterns in expand_vec_perm_const_1 already where perm.series_p () is available. This patch introduces shuffle_series as new permutation pattern and tries to recognize series like [base0 base1 base1 + step ...]. If such a series is found the series is expanded by expand_vec_series and a gather is emitted. On top the patch fixes the step recognition in expand_const_vector for stepped series where such a series would end up before. This fixes several execution failures when running code compiled for a scalable vector size of 128 on a target with vlen = 256 or higher. The problem was only noticed there because the encoding for a reversed [2 2]-element vector ("3 2 1 0") is { [1 2], [0 2], [1 4] }. Some testcases that failed were: vect-alias-check-18.c vect-alias-check-1.F90 pr64365.c On a 128-bit target, only the first two elements are used. The third element causing the complications only comes into effect at vlen = 256. With this patch the testsuite results are similar with vlen = 128 and vlen = 256 (when built with -march=rv64gcv_zvl128b). Regards Robin gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector): Fix step calculation. (modulo_sel_indices): Also perform modulo for variable-length constants. (shuffle_series): Recognize series permutations. (expand_vec_perm_const_1): Add shuffle_series. --- gcc/config/riscv/riscv-v.cc | 66 +++++++++++++++++++++++++++++++++++-- 1 file changed, 64 insertions(+), 2 deletions(-) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 9b99d0aca84..fd6ef0660a2 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -1378,12 +1378,15 @@ expand_const_vector (rtx target, rtx src) { base0, base1, base1 + step, base1 + step * 2, ... } */ rtx base0 = builder.elt (0); rtx base1 = builder.elt (1); - rtx step = builder.elt (2); + rtx base2 = builder.elt (2); + + scalar_mode elem_mode = GET_MODE_INNER (mode); + rtx step = simplify_binary_operation (MINUS, elem_mode, base2, base1); + /* Step 1 - { base1, base1 + step, base1 + step * 2, ... } */ rtx tmp = gen_reg_rtx (mode); expand_vec_series (tmp, base1, step); /* Step 2 - { base0, base1, base1 + step, base1 + step * 2, ... } */ - scalar_mode elem_mode = GET_MODE_INNER (mode); if (!rtx_equal_p (base0, const0_rtx)) base0 = force_reg (elem_mode, base0); @@ -3395,6 +3398,63 @@ shuffle_extract_and_slide1up_patterns (struct expand_vec_perm_d *d) return true; } +static bool +shuffle_series (struct expand_vec_perm_d *d) +{ + if (!d->one_vector_p || d->perm.encoding ().npatterns () != 1) + return false; + + poly_int64 el1 = d->perm[0]; + poly_int64 el2 = d->perm[1]; + poly_int64 el3 = d->perm[2]; + + poly_int64 step1 = el2 - el1; + poly_int64 step2 = el3 - el2; + + bool need_insert = false; + bool have_series = false; + + /* Check for a full series. */ + if (known_ne (step1, 0) && d->perm.series_p (0, 1, el1, step1)) + have_series = true; + + /* Check for a series starting at the second element. */ + else if (known_ne (step2, 0) && d->perm.series_p (1, 1, el2, step2)) + { + have_series = true; + need_insert = true; + } + + if (!have_series) + return false; + + /* Get a vector int-mode to be used for the permute selector. */ + machine_mode sel_mode = related_int_vector_mode (d->vmode).require (); + insn_code icode = optab_handler (vec_shl_insert_optab, sel_mode); + + /* We need to be able to insert an element and shift the vector. */ + if (need_insert && icode == CODE_FOR_nothing) + return false; + + /* Success! */ + if (d->testing_p) + return true; + + /* Create the series. */ + machine_mode eltmode = Pmode; + rtx series = gen_reg_rtx (sel_mode); + expand_vec_series (series, gen_int_mode (need_insert ? el2 : el1, eltmode), + gen_int_mode (need_insert ? step2 : step1, eltmode)); + + /* Insert the remaining element if necessary. */ + if (need_insert) + emit_insn (GEN_FCN (icode) (series, series, gen_int_mode (el1, eltmode))); + + emit_vlmax_gather_insn (d->target, d->op0, series); + + return true; +} + /* Recognize the pattern that can be shuffled by generic approach. */ static bool @@ -3475,6 +3535,8 @@ expand_vec_perm_const_1 (struct expand_vec_perm_d *d) return true; if (shuffle_extract_and_slide1up_patterns (d)) return true; + if (shuffle_series (d)) + return true; if (shuffle_generic_patterns (d)) return true; return false;