diff mbox series

[committed,amdgcn] Fix ICE on unsupported FP comparison

Message ID d2745b5c-0827-788b-d6ac-60dcfcabe506@codesourcery.com
State New
Headers show
Series [committed,amdgcn] Fix ICE on unsupported FP comparison | expand

Commit Message

Andrew Stubbs Jan. 24, 2020, 2:58 p.m. UTC 
I've committed this patch to fix an ICE building the 
gcc.dg/vect/fast-math-pr55281.c testcase.

The problem was that the combine pass was trying to use the "unle" and 
"ungt" FP comparison operators. There's no hardware support for these, 
so the operators should have been rejected, but the predicates were too 
loose.

Andrew

Comments

Andrew Stubbs Jan. 28, 2020, 4:30 p.m. UTC | #1 
On 24/01/2020 14:58, Andrew Stubbs wrote:
> I've committed this patch to fix an ICE building the 
> gcc.dg/vect/fast-math-pr55281.c testcase.

Oops, I got that crossed. This was the fix for gcc.dg/pr50310-2.c. The 
fast-math-pr55281.c fix will be posted shortly.

> The problem was that the combine pass was trying to use the "unle" and 
> "ungt" FP comparison operators. There's no hardware support for these, 
> so the operators should have been rejected, but the predicates were too 
> loose.
> 
> Andrew
diff mbox series

Patch

Fix ICE on unsupported FP comparison

2020-01-24  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
	gcn_fp_compare_operator.
	(vec_cmpu<mode>di): Use gcn_compare_operator.
	(vec_cmp<u>v64qidi): Use gcn_compare_operator.
	(vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
	(vec_cmpu<mode>di_exec): Use gcn_compare_operator.
	(vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
	(vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
	(vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
	gcn_fp_compare_operator.
	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
	gcn_fp_compare_operator.
	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
	gcn_fp_compare_operator.
	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
	gcn_fp_compare_operator.

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 7c3de8cbc7e..331c768cb88 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2530,7 +2530,7 @@ 
 
 (define_insn "vec_cmp<mode>di"
   [(set (match_operand:DI 0 "register_operand"	      "=cV,cV,  e, e,Sg,Sg")
-	(match_operator 1 "comparison_operator"
+	(match_operator 1 "gcn_fp_compare_operator"
 	  [(match_operand:VCMP_MODE 2 "gcn_alu_operand"
 						      "vSv, B,vSv, B, v,vA")
 	   (match_operand:VCMP_MODE 3 "gcn_vop3_operand"
@@ -2549,7 +2549,7 @@ 
 
 (define_expand "vec_cmpu<mode>di"
   [(match_operand:DI 0 "register_operand")
-   (match_operator 1 "comparison_operator"
+   (match_operator 1 "gcn_compare_operator"
      [(match_operand:VCMP_MODE_INT 2 "gcn_alu_operand")
       (match_operand:VCMP_MODE_INT 3 "gcn_vop3_operand")])]
   ""
@@ -2565,7 +2565,7 @@ 
 ; There's no instruction for 8-bit vector comparison, so we need to extend.
 (define_expand "vec_cmp<u>v64qidi"
   [(match_operand:DI 0 "register_operand")
-   (match_operator 1 "comparison_operator"
+   (match_operator 1 "gcn_compare_operator"
      [(any_extend:V64SI (match_operand:V64QI 2 "gcn_alu_operand"))
       (any_extend:V64SI (match_operand:V64QI 3 "gcn_vop3_operand"))])]
   "can_create_pseudo_p ()"
@@ -2582,7 +2582,7 @@ 
 (define_insn "vec_cmp<mode>di_exec"
   [(set (match_operand:DI 0 "register_operand"	       "=cV,cV,  e, e,Sg,Sg")
 	(and:DI
-	  (match_operator 1 "comparison_operator"
+	  (match_operator 1 "gcn_fp_compare_operator"
 	    [(match_operand:VCMP_MODE 2 "gcn_alu_operand"
 						       "vSv, B,vSv, B, v,vA")
 	     (match_operand:VCMP_MODE 3 "gcn_vop3_operand"
@@ -2602,7 +2602,7 @@ 
 
 (define_expand "vec_cmpu<mode>di_exec"
   [(match_operand:DI 0 "register_operand")
-   (match_operator 1 "comparison_operator"
+   (match_operator 1 "gcn_compare_operator"
      [(match_operand:VCMP_MODE_INT 2 "gcn_alu_operand")
       (match_operand:VCMP_MODE_INT 3 "gcn_vop3_operand")])
    (match_operand:DI 4 "gcn_exec_reg_operand")]
@@ -2619,7 +2619,7 @@ 
 
 (define_expand "vec_cmp<u>v64qidi_exec"
   [(match_operand:DI 0 "register_operand")
-   (match_operator 1 "comparison_operator"
+   (match_operator 1 "gcn_compare_operator"
      [(any_extend:V64SI (match_operand:V64QI 2 "gcn_alu_operand"))
       (any_extend:V64SI (match_operand:V64QI 3 "gcn_vop3_operand"))])
    (match_operand:DI 4 "gcn_exec_reg_operand")]
@@ -2639,7 +2639,7 @@ 
 
 (define_insn "vec_cmp<mode>di_dup"
   [(set (match_operand:DI 0 "register_operand"		   "=cV,cV, e,e,Sg")
-	(match_operator 1 "comparison_operator"
+	(match_operator 1 "gcn_fp_compare_operator"
 	  [(vec_duplicate:VCMP_MODE
 	     (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
 							   " Sv, B,Sv,B, A"))
@@ -2658,7 +2658,7 @@ 
 (define_insn "vec_cmp<mode>di_dup_exec"
   [(set (match_operand:DI 0 "register_operand"		    "=cV,cV, e,e,Sg")
 	(and:DI
-	  (match_operator 1 "comparison_operator"
+	  (match_operator 1 "gcn_fp_compare_operator"
 	    [(vec_duplicate:VCMP_MODE
 	       (match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
 							    " Sv, B,Sv,B, A"))
@@ -2690,7 +2690,7 @@ 
   [(match_operand:VEC_ALLREG_MODE 0 "register_operand")
    (match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
    (match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
-   (match_operator 3 "comparison_operator"
+   (match_operator 3 "gcn_fp_compare_operator"
      [(match_operand:VEC_ALLREG_ALT 4 "gcn_alu_operand")
       (match_operand:VEC_ALLREG_ALT 5 "gcn_vop3_operand")])]
   ""
@@ -2707,7 +2707,7 @@ 
   [(match_operand:VEC_ALLREG_MODE 0 "register_operand")
    (match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
    (match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
-   (match_operator 3 "comparison_operator"
+   (match_operator 3 "gcn_fp_compare_operator"
      [(match_operand:VEC_ALLREG_ALT 4 "gcn_alu_operand")
       (match_operand:VEC_ALLREG_ALT 5 "gcn_vop3_operand")])
    (match_operand:DI 6 "gcn_exec_reg_operand" "e")]
@@ -2725,7 +2725,7 @@ 
   [(match_operand:VEC_ALLREG_MODE 0 "register_operand")
    (match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
    (match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
-   (match_operator 3 "comparison_operator"
+   (match_operator 3 "gcn_fp_compare_operator"
      [(match_operand:VEC_ALLREG_INT_MODE 4 "gcn_alu_operand")
       (match_operand:VEC_ALLREG_INT_MODE 5 "gcn_vop3_operand")])]
   ""
@@ -2742,7 +2742,7 @@ 
   [(match_operand:VEC_ALLREG_MODE 0 "register_operand")
    (match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
    (match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
-   (match_operator 3 "comparison_operator"
+   (match_operator 3 "gcn_fp_compare_operator"
      [(match_operand:VEC_ALLREG_INT_MODE 4 "gcn_alu_operand")
       (match_operand:VEC_ALLREG_INT_MODE 5 "gcn_vop3_operand")])
    (match_operand:DI 6 "gcn_exec_reg_operand" "e")]