From patchwork Mon May 22 07:48:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 765283 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wWW570j11z9s06 for ; Mon, 22 May 2017 17:49:14 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="yY0oee4W"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=oIDMXsQiFGWh+eZg2 TmlliJBIzgKHsmgYzxuTc0kloj05ZcjAB2r6ZyUxMEQeNkk9Hq46HjKYGial/lMj Pq0FR2CrQ2jJ+g44fvSjGcXtD1xxAm1bBwz8f8Nr1cC0MikMRuXYcOitlqR2Az0F VxAyBSjNIKiofgA9xxz92JEzUM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=jdzVup/yGGCfoVPrMv51Vt/ ILN8=; b=yY0oee4WR3mpaVZCBntWmQJHffbEg28wZtbvESU1w4ThU2t55KlXOdf 8ozROprS/62MvrwwblTzt8ldd38nb6/u+YmR7pOJXahhoERqcIWyb9CLQaD7Dub1 QQYPc5z3Omb8D8tipOdJzs9eWOclkEsXFhQVzkmbJ5MlVn6qvyHg= Received: (qmail 30067 invoked by alias); 22 May 2017 07:49:00 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 30048 invoked by uid 89); 22 May 2017 07:48:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=HX-Envelope-From:sk:thomas., Hx-languages-length:2466, Best X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 22 May 2017 07:48:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B3E79344; Mon, 22 May 2017 00:48:59 -0700 (PDT) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E54A73F41F; Mon, 22 May 2017 00:48:58 -0700 (PDT) Subject: Re: [PATCH, GCC/testsuite/ARM] Add MOVT testing for ARMv8-M Baseline To: Kyrill Tkachov , Ramana Radhakrishnan , Richard Earnshaw , "gcc-patches@gcc.gnu.org" References: <0e70ca1d-01fd-1549-21bc-9b60c78f471b@foss.arm.com> From: Thomas Preudhomme Message-ID: Date: Mon, 22 May 2017 08:48:57 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <0e70ca1d-01fd-1549-21bc-9b60c78f471b@foss.arm.com> X-IsSubscribed: yes Ping? Best regards, Thomas On 11/05/17 16:13, Thomas Preudhomme wrote: > Hi, > > When ARMv8-M Baseline support was introduced no testcase was added for > support of the MOVT instruction because GCC would always prefer a load > from literal pool. With the recent work to fix -mslow-flash-data by > Andre Simoes Dias Vieira and Prakhar Bahuguna it is now possible to > test that support. > > This commit adds a test for MOVT based on the MOVW test by using > -mslow-flash-data to ensure that GCC does not do a literal load of the > immediate. As such, this test is restricted to Cortex-M devices (where > -mslow-flash-data is available) with MOVT instruction. > > ChangeLog entry is as follows: > > *** gcc/testsuite/ChangeLog *** > > 2017-05-2017 Thomas Preud'homme > > * gcc.target/arm/movsi_movt.c: New test. > * gcc.target/arm/movdi_movt.c: New test. > > Testing: the new tests have been tested to pass for ARMv7-M and > ARMv8-M (Baseline and Mainline) on arm-none-eabi and armeb-none-eabi > targets. > > Is this ok for trunk? > > Best regards, > > Thomas diff --git a/gcc/testsuite/gcc.target/arm/movdi_movt.c b/gcc/testsuite/gcc.target/arm/movdi_movt.c new file mode 100644 index 0000000000000000000000000000000000000000..e2a28ccbd994ed0e4d0b9ac432df32138820432c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/movdi_movt.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { arm_cortex_m && { arm_thumb2_ok || arm_thumb1_movt_ok } } } } */ +/* { dg-options "-O2 -mslow-flash-data" } */ + +unsigned long long +movdi_1 (int a) +{ + return 0xF0F00000LLU; +} + +unsigned long long +movdi_2 (int a) +{ + return 0xF0F0000000000000LLU; +} + +/* Accept r1 because big endian targets put the low bits in the highest + numbered register of a pair. */ +/* { dg-final { scan-assembler-times "movt\tr\[01\], 61680" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/movsi_movt.c b/gcc/testsuite/gcc.target/arm/movsi_movt.c new file mode 100644 index 0000000000000000000000000000000000000000..3cf46e2fd172ee1728b7b50c1cead90924962dca --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/movsi_movt.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { arm_cortex_m && { arm_thumb2_ok || arm_thumb1_movt_ok } } } } */ +/* { dg-options "-O2 -mslow-flash-data" } */ + +unsigned +movsi (void) +{ + return 0xF0F00000U; +} + +/* { dg-final { scan-assembler-times "movt\tr0, 61680" 1 } } */