@@ -116,6 +116,8 @@ extern void abort (void);
# if defined (__CK807__) || defined (__CK810__)
# define PIC_REG "r28"
# endif
+#elif defined (__AMDGCN__)
+/* No pic register. */
#else
# error "Modify the test for your target."
#endif
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* csky-*-* } } */
+/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* amdgpu-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* csky-*-* } } */
/* { dg-options "-Werror" } */
/* { dg-additional-options "-mbackchain" { target { s390*-*-* } } } */
@@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-require-effective-target untyped_assembly } */
-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-* nds32*-*-*" } } */
+/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-* nds32*-*-* amdgcn-*-*" } } */
/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs." { "riscv*-*-*" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } } */
@@ -1,5 +1,5 @@
/* { dg-do compile { target sqrt_insn } } */
-/* { dg-options "-fgimple -O2" } */
+/* { dg-options "-fgimple -O2 -ffast-math" } */
double __GIMPLE
f1 (double x)
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-additional-options "-mlocal-symbol-id=" { target amdgcn-*-* } } */
/* { dg-final { scan-assembler-not {foo[1-9]\.[0-9]} } } */
/* Check that we don't get .0 suffixes on static variables when not using
@@ -2,6 +2,7 @@
/* { dg-do run } */
/* { dg-options "-O2" } */
/* { dg-require-effective-target ptr32plus } */
+/* { dg-timeout-factor 2 } */
#include <stdio.h>
#include <stdlib.h>
@@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-options "-O2" } */
-/* { dg-additional-options "-DMAX_COPY=1025" { target { { simulator } || { nvptx-*-* } } } } */
+/* { dg-additional-options "-DMAX_COPY=1025" { target { { simulator } || { nvptx-*-* amdgcn*-*-* } } } } */
/* { dg-additional-options "-minline-stringops-dynamically" { target { i?86-*-* x86_64-*-* } } } */
#include "pr59605.c"
@@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { amdgcn*-*-* cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* -msave-restore disables sibcall patterns. */
@@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* nvptx-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { amdgcn*-*-* cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* nvptx-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* -msave-restore disables sibcall patterns. */
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* amdgcn-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { nds32*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
@@ -39,4 +39,4 @@ int main ()
}
-/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail amdgcn*-*-* } } } */
@@ -45,8 +45,10 @@ int xxx(void)
relaxation. */
/* CRIS keeps the address in a register. */
/* m68k sometimes puts the address in a register, depending on CPU and PIC. */
+/* AMD GCN loads symbol addresses as hi/lo pairs, and then reuses that for
+ each jump. */
-/* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* i?86-*-mingw* i?86-*-cygwin* x86_64-*-mingw* visium-*-* nvptx*-*-* } } } */
+/* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* i?86-*-mingw* i?86-*-cygwin* x86_64-*-mingw* visium-*-* nvptx*-*-* amdgcn*-*-* } } } */
/* { dg-final { scan-assembler-times "foo,%r" 5 { target hppa*-*-* } } } */
/* { dg-final { scan-assembler-times "= foo" 5 { target ia64*-*-* } } } */
/* { dg-final { scan-assembler-times "call\[ \t\]*_foo" 5 { target i?86-*-mingw* i?86-*-cygwin* } } } */
@@ -56,3 +58,5 @@ int xxx(void)
/* { dg-final { scan-assembler-times "\[jb\]sr" 5 { target fido-*-* m68k-*-* } } } */
/* { dg-final { scan-assembler-times "bra *tr,r\[1-9\]*,r21" 5 { target visium-*-* } } } */
/* { dg-final { scan-assembler-times "(?n)\[ \t\]call\[ \t\].*\[ \t\]foo," 5 { target nvptx*-*-* } } } */
+/* { dg-final { scan-assembler-times "add_u32\t\[sv\]\[0-9\]*, \[sv\]\[0-9\]*, foo@rel32@lo" 1 { target { amdgcn*-*-* } } } } */
+/* { dg-final { scan-assembler-times "s_swappc_b64" 5 { target { amdgcn*-*-* } } } } */
@@ -13,4 +13,4 @@ int foo()
}
/* Listed targets xfailed due to PR84958. */
-/* { dg-final { scan-tree-dump "return 285;" "optimized" { xfail { { alpha*-*-* nvptx*-*-* } || { sparc*-*-* && lp64 } } } } } */
+/* { dg-final { scan-tree-dump "return 285;" "optimized" { xfail { { alpha*-*-* amdgcn*-*-* nvptx*-*-* } || { sparc*-*-* && lp64 } } } } } */
@@ -1,5 +1,9 @@
/* Check if system supports SIMD */
+#ifdef __AMDGCN__
+#define signal(A,B)
+#else
#include <signal.h>
+#endif
#if defined(__i386__) || defined(__x86_64__)
# include "cpuid.h"
@@ -16,8 +16,9 @@ integer :: aa(4,4)
call test(aa)
end
-! { dg-final { scan-assembler-times "\[ \t\]\[$,_0-9\]*myBindC" 1 { target { ! { hppa*-*-* s390*-*-* *-*-cygwin* } } } } }
+! { dg-final { scan-assembler-times "\[ \t\]\[$,_0-9\]*myBindC" 1 { target { ! { hppa*-*-* s390*-*-* *-*-cygwin* amdgcn*-*-* } } } } }
! { dg-final { scan-assembler-times "myBindC,%r2" 1 { target { hppa*-*-* } } } }
! { dg-final { scan-assembler-times "call\tmyBindC" 1 { target { *-*-cygwin* } } } }
! { dg-final { scan-assembler-times "brasl\t%r\[0-9\]*,myBindC" 1 { target { s390*-*-* } } } }
+! { dg-final { scan-assembler-times "add_u32\t\[sv\]\[0-9\]*, \[sv\]\[0-9\]*, myBindC@rel32@lo" 1 { target { amdgcn*-*-* } } } }
! { dg-final { scan-tree-dump-times "test \\\(&parm\\." 1 "original" } }
@@ -662,6 +662,7 @@ proc check_profiling_available { test_what } {
# missing other needed machinery.
if {[istarget aarch64*-*-elf]
|| [istarget am3*-*-linux*]
+ || [istarget amdgcn-*-*]
|| [istarget arm*-*-eabi*]
|| [istarget arm*-*-elf]
|| [istarget arm*-*-symbianelf*]
@@ -788,6 +789,9 @@ proc check_effective_target_global_constructor {} {
if { [istarget nvptx-*-*] } {
return 0
}
+ if { [istarget amdgcn-*-*] } {
+ return 0
+ }
return 1
}
@@ -808,6 +812,10 @@ proc check_effective_target_return_address {} {
if { [istarget nvptx-*-*] } {
return 0
}
+ # It could be supported on amdgcn, but isn't yet.
+ if { [istarget amdgcn*-*-*] } {
+ return 0
+ }
return 1
}
@@ -954,9 +962,10 @@ proc check_effective_target_fgraphite {} {
# code, 0 otherwise.
proc check_effective_target_fopenacc {} {
- # nvptx can be built with the device-side bits of openacc, but it
+ # nvptx/amdgcn can be built with the device-side bits of openacc, but it
# does not make sense to test it as an openacc host.
if [istarget nvptx-*-*] { return 0 }
+ if [istarget amdgcn-*-*] { return 0 }
return [check_no_compiler_messages fopenacc object {
void foo (void) { }
@@ -967,9 +976,10 @@ proc check_effective_target_fopenacc {} {
# code, 0 otherwise.
proc check_effective_target_fopenmp {} {
- # nvptx can be built with the device-side bits of libgomp, but it
+ # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
# does not make sense to test it as an openmp host.
if [istarget nvptx-*-*] { return 0 }
+ if [istarget amdgcn-*-*] { return 0 }
return [check_no_compiler_messages fopenmp object {
void foo (void) { }
@@ -3107,6 +3117,7 @@ proc check_effective_target_vect_int { } {
if { [istarget i?86-*-*] || [istarget x86_64-*-*]
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
+ || [istarget amdgcn-*-*]
|| [istarget spu-*-*]
|| [istarget sparc*-*-*]
|| [istarget alpha*-*-*]
@@ -3144,7 +3155,8 @@ proc check_effective_target_vect_intfloat_cvt { } {
&& ![istarget powerpc-*-linux*paired*])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
- && [et-is-effective-target mips_msa]) } {
+ && [et-is-effective-target mips_msa])
+ || [istarget amdgcn-*-*] } {
set et_vect_intfloat_cvt_saved($et_index) 1
}
}
@@ -3248,7 +3260,8 @@ proc check_effective_target_vect_uintfloat_cvt { } {
|| [istarget aarch64*-*-*]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
- && [et-is-effective-target mips_msa]) } {
+ && [et-is-effective-target mips_msa])
+ || [istarget amdgcn-*-*] } {
set et_vect_uintfloat_cvt_saved($et_index) 1
}
}
@@ -3276,7 +3289,8 @@ proc check_effective_target_vect_floatint_cvt { } {
&& ![istarget powerpc-*-linux*paired*])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
- && [et-is-effective-target mips_msa]) } {
+ && [et-is-effective-target mips_msa])
+ || [istarget amdgcn-*-*] } {
set et_vect_floatint_cvt_saved($et_index) 1
}
}
@@ -3302,7 +3316,8 @@ proc check_effective_target_vect_floatuint_cvt { } {
&& ![istarget powerpc-*-linux*paired*])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
- && [et-is-effective-target mips_msa]) } {
+ && [et-is-effective-target mips_msa])
+ || [istarget amdgcn-*-*] } {
set et_vect_floatuint_cvt_saved($et_index) 1
}
}
@@ -3352,7 +3367,8 @@ proc check_effective_target_vect_simd_clones { } {
# specified arch will be chosen, but still we need to at least
# be able to assemble avx512f.
if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
- && [check_effective_target_avx512f]) } {
+ && [check_effective_target_avx512f])
+ || [istarget amdgcn-*-*] } {
set et_vect_simd_clones_saved($et_index) 1
}
}
@@ -5462,7 +5478,8 @@ proc check_effective_target_vect_shift { } {
&& ([et-is-effective-target mips_msa]
|| [et-is-effective-target mips_loongson]))
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_shift_saved($et_index) 1
}
}
@@ -5482,7 +5499,8 @@ proc check_effective_target_whole_vector_shift { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_loongson])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set answer 1
} else {
set answer 0
@@ -5504,6 +5522,7 @@ proc check_effective_target_vect_bswap { } {
set et_vect_bswap_saved($et_index) 0
if { [istarget aarch64*-*-*]
|| [is-effective-target arm_neon]
+ || [istarget amdgcn-*-*]
} {
set et_vect_bswap_saved($et_index) 1
}
@@ -5530,7 +5549,8 @@ proc check_effective_target_vect_shift_char { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_shift_char_saved($et_index) 1
}
}
@@ -5555,7 +5575,8 @@ proc check_effective_target_vect_long { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set answer 1
} else {
set answer 0
@@ -5589,7 +5610,8 @@ proc check_effective_target_vect_float { } {
&& [et-is-effective-target mips_msa])
|| [is-effective-target arm_neon]
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vxe]) } {
+ && [check_effective_target_s390_vxe])
+ || [istarget amdgcn-*-*] } {
set et_vect_float_saved($et_index) 1
}
}
@@ -5631,7 +5653,8 @@ proc check_effective_target_vect_double { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_double_saved($et_index) 1
}
}
@@ -5767,7 +5790,8 @@ proc check_effective_target_vect_perm { } {
&& ([et-is-effective-target mpaired_single]
|| [et-is-effective-target mips_msa]))
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_perm_saved($et_index) 1
}
}
@@ -5872,7 +5896,8 @@ proc check_effective_target_vect_perm_byte { } {
|| ([istarget mips-*.*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_perm_byte_saved($et_index) 1
}
}
@@ -5913,7 +5938,8 @@ proc check_effective_target_vect_perm_short { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_perm_short_saved($et_index) 1
}
}
@@ -6084,7 +6110,8 @@ proc check_effective_target_vect_widen_mult_qi_to_hi { } {
&& ![check_effective_target_aarch64_sve])
|| [is-effective-target arm_neon]
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
}
}
@@ -6124,7 +6151,8 @@ proc check_effective_target_vect_widen_mult_hi_to_si { } {
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| [is-effective-target arm_neon]
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_widen_mult_hi_to_si_saved($et_index) 1
}
}
@@ -6151,7 +6179,8 @@ proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
}
}
@@ -6181,7 +6210,8 @@ proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
}
}
@@ -6578,7 +6608,8 @@ proc check_effective_target_vect_natural_alignment { } {
set et_vect_natural_alignment 1
if { [check_effective_target_arm_eabi]
|| [istarget nvptx-*-*]
- || [istarget s390*-*-*] } {
+ || [istarget s390*-*-*]
+ || [istarget amdgcn-*-*] } {
set et_vect_natural_alignment 0
}
verbose "check_effective_target_vect_natural_alignment:\
@@ -6589,7 +6620,8 @@ proc check_effective_target_vect_natural_alignment { } {
# Return true if fully-masked loops are supported.
proc check_effective_target_vect_fully_masked { } {
- return [check_effective_target_aarch64_sve]
+ return [expr { [check_effective_target_aarch64_sve]
+ || [istarget amdgcn*-*-*] }]
}
# Return 1 if the target doesn't prefer any alignment beyond element
@@ -6648,7 +6680,8 @@ proc check_effective_target_vect_element_align { } {
set et_vect_element_align($et_index) 0
if { ([istarget arm*-*-*]
&& ![check_effective_target_arm_vect_no_misalign])
- || [check_effective_target_vect_hw_misalign] } {
+ || [check_effective_target_vect_hw_misalign]
+ || [istarget amdgcn-*-*] } {
set et_vect_element_align($et_index) 1
}
}
@@ -6690,13 +6723,15 @@ proc check_effective_target_vect_load_lanes { } {
# Return 1 if the target supports vector masked stores.
proc check_effective_target_vect_masked_store { } {
- return [check_effective_target_aarch64_sve]
+ return [expr { [check_effective_target_aarch64_sve]
+ || [istarget amdgcn*-*-*] }]
}
# Return 1 if the target supports vector scatter stores.
proc check_effective_target_vect_scatter_store { } {
- return [check_effective_target_aarch64_sve]
+ return [expr { [check_effective_target_aarch64_sve]
+ || [istarget amdgcn*-*-*] }]
}
# Return 1 if the target supports vector conditional operations, 0 otherwise.
@@ -6719,7 +6754,8 @@ proc check_effective_target_vect_condition { } {
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_cond_saved($et_index) 1
}
}
@@ -6746,7 +6782,8 @@ proc check_effective_target_vect_cond_mixed { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_cond_mixed_saved($et_index) 1
}
}
@@ -6774,7 +6811,8 @@ proc check_effective_target_vect_char_mult { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_char_mult_saved($et_index) 1
}
}
@@ -6804,7 +6842,8 @@ proc check_effective_target_vect_short_mult { } {
&& ([et-is-effective-target mips_msa]
|| [et-is-effective-target mips_loongson]))
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_short_mult_saved($et_index) 1
}
}
@@ -6833,7 +6872,8 @@ proc check_effective_target_vect_int_mult { } {
&& [et-is-effective-target mips_msa])
|| [check_effective_target_arm32]
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_vect_int_mult_saved($et_index) 1
}
}
@@ -6949,6 +6989,9 @@ foreach N {2 3 4 8} {
|| [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
set et_vect_stridedN_saved($et_index) 1
}
+ if [check_effective_target_vect_fully_masked] {
+ set et_vect_stridedN_saved($et_index) 1
+ }
}
verbose "check_effective_target_vect_stridedN:\
@@ -7038,7 +7081,8 @@ proc check_effective_target_sqrt_insn { } {
|| [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) } {
+ && [check_effective_target_s390_vx])
+ || [istarget amdgcn-*-*] } {
set et_sqrt_insn_saved 1
}
}
@@ -7076,7 +7120,8 @@ proc check_effective_target_vect_call_sqrtf { } {
proc check_effective_target_vect_call_lrint { } {
set et_vect_call_lrint 0
if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
- && [check_effective_target_ilp32]) } {
+ && [check_effective_target_ilp32])
+ || [istarget amdgcn-*-*] } {
set et_vect_call_lrint 1
}
@@ -7095,7 +7140,8 @@ proc check_effective_target_vect_call_btrunc { } {
using cached result" 2
} else {
set et_vect_call_btrunc_saved($et_index) 0
- if { [istarget aarch64*-*-*] } {
+ if { [istarget aarch64*-*-*]
+ || [istarget amdgcn-*-*] } {
set et_vect_call_btrunc_saved($et_index) 1
}
}
@@ -7116,7 +7162,8 @@ proc check_effective_target_vect_call_btruncf { } {
using cached result" 2
} else {
set et_vect_call_btruncf_saved($et_index) 0
- if { [istarget aarch64*-*-*] } {
+ if { [istarget aarch64*-*-*]
+ || [istarget amdgcn-*-*] } {
set et_vect_call_btruncf_saved($et_index) 1
}
}
@@ -7136,7 +7183,8 @@ proc check_effective_target_vect_call_ceil { } {
verbose "check_effective_target_vect_call_ceil: using cached result" 2
} else {
set et_vect_call_ceil_saved($et_index) 0
- if { [istarget aarch64*-*-*] } {
+ if { [istarget aarch64*-*-*]
+ || [istarget amdgcn-*-*] } {
set et_vect_call_ceil_saved($et_index) 1
}
}
@@ -7196,7 +7244,8 @@ proc check_effective_target_vect_call_floorf { } {
verbose "check_effective_target_vect_call_floorf: using cached result" 2
} else {
set et_vect_call_floorf_saved($et_index) 0
- if { [istarget aarch64*-*-*] } {
+ if { [istarget aarch64*-*-*]
+ || [istarget amdgcn-*-*] } {
set et_vect_call_floorf_saved($et_index) 1
}
}
@@ -8360,7 +8409,8 @@ proc check_effective_target_gld { } {
# (LTO) support.
proc check_effective_target_lto { } {
- if { [istarget nvptx-*-*] } {
+ if { [istarget nvptx-*-*]
+ || [istarget amdgcn-*-*] } {
return 0;
}
return [check_no_compiler_messages lto object {
@@ -8678,6 +8728,8 @@ proc check_vect_support_and_set_flags { } {
lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
set dg-do-what-default compile
}
+ } elseif [istarget amdgcn-*-*] {
+ set dg-do-what-default run
} else {
return 0
}